HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 294

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Buffer Mode Operation: Figure 10.48 shows an example of an operation in the buffer mode with
GRA set as an output compare register and GRA and buffer register A (BRA) set for buffer
operation. The TCNT operates as a periodic counter that is cleared by GRB compare match.
TIOCA and TIOCB are set to toggle at compare matches A and B. Since buffer mode is selected,
when TIOCA toggles at a compare match A, the BRA value is simultaneously transferred to the
GRA. This operation is repeated at every compare match A. The transfer timing is shown in figure
10.49.
276 RENESAS
H' 0250
H' 0200
H' 0100
H' 0000
TIOCB
TIOCA
TCNT value
GRB
GRA
Figure 10.48 Buffer Mode Operation Example 1 (Output Compare Register)
BRA
H' 0250
H' 0200
H' 0200
H' 0100
Counter cleared by compare match B
Compare match A
H' 0100
H' 0200
H' 0200
Time
Toggle
output
Toggle
output

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