HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 430

• Manufacturer Part Number: HD6417020SX20IV
• Description: SH 1 CORE 32B MPU, 20MHZ/5V, 100
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6417020SX20IV

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

15.1
There are two ports, A and B. Ports A and B are 16-bit I/O ports. The pins of the ports are all
multiplexed for use as general-purpose I/Os or for other functions. (Use the pin function controller
(PFC) to select the function of multiplexed pins.) Ports A and B each have one data register for
storing pin data.
15.2
Port A is a 16-pin input/output port, as shown in figure 15.1. The PA3/CS7/WAIT pin of port A
has a pull-up MOS so that when it is functioning as a WAIT pin, the wait state control register of
the bus state controller can be used to select whether to pull up the WAIT pin or not. It is not
pulled up when the pin is functioning as either PA3 or CS7.
15.2.1
Table 15.1 summarizes the port A register.
Overview
Port A
Register Configuration
Port A
PA
PA
PA
PA
PA
PA
PA
PA
PA
PA
PA
PA
PA
PA
PA
PA
Section 15 Parallel I/O Ports
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
(Input/output)/AH (Output)/IRQOUT (Output)
(Input/output)/BREQ (Input)
(Input/output)/BACK (Output)
(Input/output)/RD (Output)
(Input/output)/WRH (Output) (LBS (Output))
(Input/output)/WRL (Output) (WR (Output))
(Input/output)/CS7 (Output)/WAIT (Input)
(Input/output)/CS6 (Output)/TIOCB0 (Input/output)
(Input/output)/CS5 (Output)/RAS (Output)
(Input/output)/CS4 (Output)/TIOCA0 (Input/output)
(Input/output)/IRQ3 (Input)/DREQ1 (Input)
(Input/output)/IRQ2 (Input)/DACK1 (Output)
(Input/output)/IRQ1 (Input)/DREQ0 (Input)/TCLKB (Input)
(Input/output)/IRQ0 (Input)/DACK0 (Output)/TCLKA (Input)
(Input/output)/DPH (Input/output)/TIOCB1 (Input/output)
(Input/output)/DPL (Input/output)/TIOCA1 (Input/output)
Figure 15.1 Port A Configuration
RENESAS 415