MCF5216CVM66J Freescale Semiconductor, MCF5216CVM66J Datasheet - Page 601

• Manufacturer Part Number: MCF5216CVM66J
• Description: IC MCU 512K FLASH 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5216CVM66J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF521x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: M52210DEMO, M52211EVB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Figure 28-50
stress conditions.
The current into the signal (I
Where:
V
V
V
R
R
The current into (I
bipolar transistor (K
I
Where:
I
A method for minimizing the impact of stress conditions on the QADC is to strategically allocate QADC
inputs so that the lower accuracy inputs are adjacent to the inputs most likely to see stress conditions.
Also, suitable source impedances should be selected to meet design goals and minimize the effect of stress
conditions.
Freescale Semiconductor
In
INJ
Stress
Selected
Stress
EB
BE
= – K
= Parasitic NPN base/emitter voltage
is either I
= Parasitic PNP emitter/base voltage
= Source impedance (10 kΩ resistor in
= Adjustable voltage source
N
= Source impedance on channel selected for conversion
* I
shows an active parasitic bipolar NPN transistor when an input signal is subjected to negative
INJ
INJN
Figure 28-51
In
or I
) the neighboring pin is determined by the K
N
‹‹ 1). The I
INJP
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 28-50. Input Signal Subjected to Negative Stress
Figure 28-51. Input Signal Subjected to Positive Stress
.
INJN
V
IN
V
IN
shows positive stress conditions can activate a similar PNP transistor.
V
or I
V
STRESS
In
STRESS
+
INJP
can be expressed by this equation:
I INJP
I INJN
+
) under negative or positive stress is determined by these equations:
=
=
R
V Stress V EB
-------------------------------------------------------------- -
R
SELECTED
–
---------------------------------------------- -
R
(
STRESS
10 kΩ
R
V Stress V BE
Figure 28-50
SELECTED
STRESS
10 kΩ
R Stress
R Stress
–
I
injP
I
IN
–
I
I
injn
IN
AN
–
AN
Parasitic
Device
AN
V DDA
AN
Parasitic
)
n+1
n
and
Device
n+1
n
Signal Under
Adjacent
Signal Under
Stress
Signal
Figure 28-51
Adjacent
N
Stress
Signal
(current coupling ratio) of the parasitic
Queued Analog-to-Digital Converter (QADC)
V
DDA
on stressed channel)
Eqn. 28-1
Eqn. 28-2
28-63