DF2378RVFQ34WV Renesas Electronics America, DF2378RVFQ34WV Datasheet - Page 264

• Manufacturer Part Number: DF2378RVFQ34WV
• Description: MCU 3V 512K I-TEMP PB-FREE 144-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2378RVFQ34WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 34MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
6.6.7
If the RAST bit is set to 1 in DRAMCR, the RAS signal goes low from the beginning of the T
state, and the row address hold time and DRAM read access time are changed relative to the fall of
the RAS signal. Use the optimum setting according to the DRAM connected and the operating
frequency of this LSI. Figure 6.23 shows an example of the timing when the RAS signal goes low
from the beginning of the T
Rev.7.00 Mar. 18, 2009 page 196 of 1136
REJ09B0109-0700
Read
Write
Note: n = 2 to 5
Figure 6.23 Example of Access Timing when RAS Signal Goes Low from Beginning
Row Address Output State Control
φ
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
r
state.
T
of T
p
Row address
r
State (CAST = 0)
T
r
High
High
T
c1
Column address
T
c2
r