HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 24
HD6417727BP100BV
Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP100BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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Section 10 On-Chip Oscillation Circuits
10.1 Overview........................................................................................................................... 257
10.2 Overview of the CPG........................................................................................................ 259
10.3 Clock Operating Modes .................................................................................................... 262
10.4 Register Descriptions ........................................................................................................ 267
10.5 Changing the Frequency ................................................................................................... 270
10.6 Overview of the WDT....................................................................................................... 271
10.7 WDT Registers.................................................................................................................. 272
10.8 Using the WDT ................................................................................................................. 275
10.9 Notes on Board Design ..................................................................................................... 277
Section 11 Extend Clock Pulse Generator for USB (EXCPG)
11.1 Overview........................................................................................................................... 279
11.2 Functions........................................................................................................................... 279
11.3 Register Descriptions ........................................................................................................ 280
11.4 Usage Notes ...................................................................................................................... 281
Rev.6.00 Mar. 27, 2009 Page xxii of lvi
REJ09B0254-0600
10.1.1 Features................................................................................................................ 257
10.2.1 CPG Block Diagram ............................................................................................ 259
10.2.2 CPG Pin Configuration ........................................................................................ 261
10.2.3 CPG Register Configuration ................................................................................ 261
10.4.1 Frequency Control Register (FRQCR)................................................................. 267
10.4.2 CKIO2 Control Register (CKIO2CR).................................................................. 269
10.5.1 Changing the Multiplication Rate ........................................................................ 270
10.5.2 Changing the Division Ratio................................................................................ 270
10.6.1 Block Diagram of the WDT................................................................................. 271
10.6.2 Register Configurations ....................................................................................... 272
10.7.1 Watchdog Timer Counter (WTCNT)................................................................... 272
10.7.2 Watchdog Timer Control/Status Register (WTCSR)........................................... 273
10.7.3 Notes on Register Access..................................................................................... 275
10.8.1 Canceling Standby Mode ..................................................................................... 275
10.8.2 Changing the Frequency ...................................................................................... 276
10.8.3 Using Watchdog Timer Mode.............................................................................. 276
10.8.4 Using Interval Timer Mode.................................................................................. 277
11.1.1 EXCPG ................................................................................................................ 279
11.2.1 Block Diagram..................................................................................................... 279
11.2.2 Pin Configuration................................................................................................. 280
11.2.3 Register Configuration......................................................................................... 280
11.3.1 EXCPG Control Register (EXCPGCR) ............................................................... 280
...................................................................... 257
.............................. 279
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