HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 772

IC SUPERH MPU ROMLESS 240BGA

HD6417727BP100BV

Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP100BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Section 23 USB Function Controller
to the host automatically. When reading of the receive data is completed following data reception,
1 is written to the USBTRG/EP1 RDFN bit. This operation empties the FIFO that has just been
read, and makes it ready to receive the next packet.
23.6.5
Rev.6.00 Mar. 27, 2009 Page 714 of 1036
REJ09B0254-0600
USBIFR0/EP2 EMPTY status
bit automatically cleared to 0
EP2 Bulk-In Transfer (Dual FIFOs)
Data transmission to host
IN token reception
in EP2 FIFO?
in EP2 FIFO?
Valid data
Space
Yes
No
ACK
Figure 23.11 EP2 Bulk-In Transfer Operation
USB function
No
Yes
NACK
bit automatically
USBIFR0/EP2
EMPTY status
set 1
Interrupt
request
USBIFR0/EP2 TR interrupt
(USBTRG/EP2 PKTE = 1)
Write 1 to USBIER0/EP2
Write one-packet data to
USBIFR0/EP2 EMPTY
Write 1 to EP2 packet
USBEP2 data register
Application
EMPTY enable bit
enable bit
interrupt

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