M30620FCAFP#D3 Renesas Electronics America, M30620FCAFP#D3 Datasheet - Page 254
![IC M16C MCU FLASH 128K 100LQFP](/photos/28/61/286112/100-bqfp__prqp0100jb-a_sml.jpg)
M30620FCAFP#D3
Manufacturer Part Number
M30620FCAFP#D3
Description
IC M16C MCU FLASH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Specifications of M30620FCAFP#D3
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Appendix Standard Serial I/O Mode 1 (Flash Memory Version)
Table 1.29.2. Status register (SRD)
Status Register (SRD)
SRD0 bits
SR7 (bit7)
SR6 (bit6)
SR5 (bit5)
SR4 (bit4)
SR3 (bit3)
SR2 (bit2)
SR1 (bit1)
SR0 (bit0)
The status register indicates operating status of the flash memory and status such as whether an erase
operation or a program ended successfully or in error. It can be read by writing the read status register
command (70
Table 1.29.2 gives the definition of each status register bit. After clearing the reset, the status register
outputs “80
Write State Machine (WSM) Status (SR7)
Erase Status (SR5)
Program Status (SR4)
Block Status After Program (SR3)
The write state machine (WSM) status indicates the operating status of the flash memory. When
power is turned on, “1” (ready) is set for it. The bit is set to “0” (busy) during an auto write or auto erase
operation, but it is set back to “1” when the operation ends.
The erase status reports the operating status of the auto erase operation. If an erase error occurs, it is
set to “1”. When the erase status is cleared, it is set to “0”.
The program status reports the operating status of the auto write operation. If a write error occurs, it is
set to “1”. When the program status is cleared, it is set to “0”.
If excessive data is written (phenomenon whereby the memory cell becomes depressed which results
in data not being read correctly), “1” is set for the block status after-program at the end of the page
write operation. In other words, when writing ends successfully, “80
“90
If “1” is written for any of the SR5, SR4 or SR3 bits, the page program, block erase, erase all unlocked
blocks and lock bit program commands are not accepted. Before executing these commands, execute
the clear status register command (50
16
” is output; and when excessive data is written, “88
16
”.
16
). Also, the status register is cleared by writing the clear status register command (50
Write state machine (WSM) status
Block status after program
Program status
Status name
Erase status
Reserved
Reserved
Reserved
Reserved
16
) and clear the status register.
Terminated in error
Terminated in error
Terminated in error
16
” is output.
Ready
"1"
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
-
-
-
-
16
” is output; when writing fails,
Definition
Terminated normally
Terminated normally
Terminated normally
M16C / 62A Group
Mitsubishi microcomputers
Busy
"0"
-
-
-
-
16
).
251
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