M30620FCAFP#D3 Renesas Electronics America, M30620FCAFP#D3 Datasheet - Page 42
![IC M16C MCU FLASH 128K 100LQFP](/photos/28/61/286112/100-bqfp__prqp0100jb-a_sml.jpg)
M30620FCAFP#D3
Manufacturer Part Number
M30620FCAFP#D3
Description
IC M16C MCU FLASH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Specifications of M30620FCAFP#D3
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Clock Generating Circuit
Clock Output
Stop Mode
Table 1.10.2. Port status during stop mode
________
__________
In single-chip mode, the clock output function select bits (bits 0 and 1 at address 0006
fc to be output from the P5
0006
Writing “1” to the all-clock stop control bit (bit 0 at address 0007
puter enters stop mode. In stop mode, the content of the internal RAM is retained provided that V
mains above 2V.
Because the oscillation , BCLK, f
functions such as the A-D converter and watchdog timer do not function. However, timer A and timer B
operate provided that the event counter mode is set to an external pulse, and UARTi(i = 0 to 2), SI/O3,4
functions provided an external clock is selected. Table 1.10.2 shows the status of the ports in stop mode.
Stop mode is cancelled by a hardware reset or an interrupt. If an interrupt is to be used to cancel stop mode,
that interrupt must first have been enabled, and the priority level of the interrupt which is not used to cancel
must have been changed to 0. If returning by an interrupt, that interrupt routine is executed. If only a
hardware reset or an NMI interrupt is used to cancel stop mode, change the priority level of all interrupt to
0, then shift to stop mode.
When shifting from high-speed/medium-speed mode to stop mode and at a reset, the main clock division
select bit 0 (bit 6 at address 0006
to stop mode, the value before stop mode is retained.
Address bus, data bus, CS0 to CS3,
BHE
_____
RD, WR, WRL, WRH
HLDA, BCLK
ALE
Port
CLK
OUT
______
16
) is set to “1”, the output of f
________ _________
When fc selected
When f
Pin
8
_______
, f
32
_______
7
selected
/CLK
_______
OUT
16
1
to f
) is set to “1”. When shifting from low-speed/low power dissipation mode
8
pin. When the WAIT peripheral function clock stop bit (bit 2 at address
and f
32
, f
Retains status before stop mode
“H”
“H”
“H”
Retains status before stop mode Retains status before stop mode
Valid only in single-chip mode
Valid only in single-chip mode
32
1SIO2
Memory expansion mode
stops when a WAIT instruction is executed.
Microprocessor mode
to f
32SIO2
, f
C
, f
C32
16
, and f
) stops all oscillation and the microcom-
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
AD
“H”
Retains status before stop mode
stops in stop mode, peripheral
Single-chip mode
16
M16C / 62A Group
Mitsubishi microcomputers
) enable f
8
, f
CC
32
, or
re-
39
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