UPD78F0500MC-5A4-A Renesas Electronics America, UPD78F0500MC-5A4-A Datasheet - Page 274

• Manufacturer Part Number: UPD78F0500MC-5A4-A
• Description: MCU 8BIT FLASH SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500MC-5A4-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
(i) When CR00n is used as a compare register
(ii) When CR00n is used as a capture register
(i) When CR01n is used as a compare register
(ii) When CR01n is used as a capture register
Remark n = 0:
The value set in CR00n is constantly compared with the TM0n count value, and an interrupt request signal
(INTTM00n) is generated if they match. The value is held until CR00n is rewritten.
Caution CR00n does not perform the capture operation when it is set in the comparison mode, even if a
The count value of TM0n is captured to CR00n when a capture trigger is input.
As the capture trigger, an edge of a phase reverse to that of the TI00n pin or the valid edge of the TI01n pin can
be selected by using CRC0n or PRM0n.
The value set in CR01n is constantly compared with the TM0n count value, and an interrupt request signal
(INTTM01n) is generated if they match.
Caution CR01n does not perform the capture operation when it is set in the comparison mode, even if a
The count value of TM0n is captured to CR01n when a capture trigger is input.
It is possible to select the valid edge of the TI00n pin as the capture trigger. The TI00n pin valid edge is set by
PRM0n.
(n = 0, 1)
(n = 0, 1)
Address: FF12H, FF13H (CR000), FFB2H, FFB3H (CR001)
Address: FF14H, FF15H (CR010), FFB4H, FFB5H (CR011)
CR00n
CR01n
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
capture trigger is input to it.
capture trigger is input to it.
Figure 7-4. Format of 16-Bit Timer Capture/Compare Register 00n (CR00n)
Figure 7-5. Format of 16-Bit Timer Capture/Compare Register 01n (CR01n)
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
15
15
FF13H (CR000), FFB3H (CR001)
FF15H (CR010), FFB5H (CR011)
14
14
13
13
12
12
11
11
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
10
10
9
9
8
8
7
7
FF12H (CR000), FFB2H (CR001)
FF14H (CR010), FFB4H (CR011)
After reset: 0000H
After reset: 0000H
6
6
5
5
4
4
3
3
R/W
R/W
2
2
1
1
0
0
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