UPD78F0500MC-5A4-A Renesas Electronics America, UPD78F0500MC-5A4-A Datasheet - Page 485
UPD78F0500MC-5A4-A
Manufacturer Part Number
UPD78F0500MC-5A4-A
Description
MCU 8BIT FLASH SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0500MC-5A4-A
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Notes 1.
TPS63
2.
3.
4.
0
0
0
0
0
0
0
0
1
1
1
1
4.0 V ≤ V
2.7 V ≤ V
1.8 V ≤ V
(Standard products and
(A) grade products only)
The frequency that can be used for the peripheral hardware clock (f
supply voltage and product specifications.
(The values shown in the table above are those when f
If the peripheral hardware clock (f
= 0), when 1.8 V ≤ V
is prohibited.
This is settable only if 4.0 V ≤ V
Note the following points when selecting the TM50 output as the base clock.
• Mode in which the count clock is cleared and started upon a match of TM50 and CR50 (TMC506 =
• PWM mode (TMC506 = 1)
It is not necessary to enable (TOE50 = 1) TO50 output in any mode.
0)
Start the operation of 8-bit timer/event counter 50 first and then enable the timer F/F inversion
operation (TMC501 = 1).
Start the operation of 8-bit timer/event counter 50 first and then set the count clock to make the duty
= 50%.
Supply Voltage
TPS62
DD
DD
DD
Other than above
0
0
0
0
1
1
1
1
0
0
0
0
≤ 5.5 V
< 4.0 V
< 2.7 V
TPS61
Table 15-4. Set Value of TPS63 to TPS60
DD
0
0
1
1
0
0
1
1
0
0
1
1
< 2.7 V, the setting of TPS63 = TPS62 = TPS61 = TPS60 = 0 (base clock: f
f
f
f
Conventional-specification Products
PRS
PRS
PRS
(
μ
≤ 20 MHz
≤ 10 MHz
≤ 5 MHz
PD78F05xx and 78F05xxD)
DD
TPS60
PRS
≤ 5.5 V.
0
1
0
1
0
1
0
1
0
1
0
1
) operates on the internal high-speed oscillation clock (f
f
f
f
f
f
f
f
f
f
f
f
TM50 output
Setting prohibited
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
Note 2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
2
3
4
5
6
7
8
9
10
2 MHz
1 MHz
500 kHz
250 kHz
125 kHz
62.5 kHz
31.25 kHz 78.13 kHz 156.25 kHz 312.5 kHz
15.625 kHz 39.06 kHz 78.13 kHz 156.25 kHz
7.813 kHz 19.53 kHz 39.06 kHz 78.13 kHz
3.906 kHz 9.77 kHz
1.953 kHz 4.88 kHz
CHAPTER 15 SERIAL INTERFACE UART6
2 MHz
f
Base Clock (f
PRS
Note 4
PRS
=
= f
XH
5 MHz
2.5 MHz
1.25 MHz
625 kHz
312.5 kHz 625 kHz
156.25 kHz 312.5 kHz 625 kHz
f
f
5 MHz
PRS
PRS
f
PRS
Expanded-specification Products
(
(XSEL = 1).)
XCLK6
μ
PD78F05xxA and 78F05xxDA)
≤ 20 MHz
≤ 5 MHz
PRS
=
) Selection
) differs depending on the power
10 MHz
5 MHz
2.5 MHz
1.25 MHz
19.53 kHz 39.06 kHz
9.77 kHz
10 MHz
f
PRS
=
Note 1
20 MHz
10 MHz
5 MHz
2.5 MHz
1.25 MHz
19.53 kHz
20 MHz
f
PRS
=
Note 3
RH
) (XSEL
PRS
485
)
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