UPD78F0500MC-5A4-A Renesas Electronics America, UPD78F0500MC-5A4-A Datasheet - Page 676

• Manufacturer Part Number: UPD78F0500MC-5A4-A
• Description: MCU 8BIT FLASH SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500MC-5A4-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
Cautions 1. To use the peripheral hardware that stops operation in the STOP mode, and the peripheral hardware
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
3. To shorten oscillation stabilization time after the STOP mode is released when the CPU operates
4. If the STOP instruction is executed when AMPH = 1, supply of the CPU clock is stopped for 4.06 to
2. Even if “internal low-speed oscillator can be stopped by software” is selected by the option byte,
5. Execute the STOP instruction after having confirmed that the internal high-speed oscillator is
for which the clock that stops oscillating in the STOP mode after the STOP mode is released, restart
the peripheral hardware.
the internal low-speed oscillation clock continues in the STOP mode in the status before the STOP
mode is set. To stop the internal low-speed oscillator’s oscillation in the STOP mode, stop it by
software and then execute the STOP instruction.
with the high-speed system clock (X1 oscillation), switch the CPU clock to the internal high-speed
oscillation clock before the execution of the STOP instruction using the following procedure.
<1> Set RSTOP to 0 (starting oscillation of the internal high-speed oscillator) → <2> Set MCM0 to 0
(switching the CPU from X1 oscillation to internal high-speed oscillation) → <3> Check that MCS is 0
(checking the CPU clock) → <4> Check that RSTS is 1 (checking internal high-speed oscillation
operation) → <5> Execute the STOP instruction
Before changing the CPU clock from the internal high-speed oscillation clock to the high-speed
system clock (X1 oscillation) after the STOP mode is released, check the oscillation stabilization
time with the oscillation stabilization time counter status register (OSTC).
16.12
as the CPU clock, or for the duration of 160 external clocks when the high-speed system clock
(external clock input) is selected as the CPU clock.
operating stably (RSTS = 1).
μ
s after the STOP mode is released when the internal high-speed oscillation clock is selected
CHAPTER 22 STANDBY FUNCTION
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