MAXQ622G-0000+ Maxim Integrated Products, MAXQ622G-0000+ Datasheet - Page 18

• Manufacturer Part Number: MAXQ622G-0000+
• Description: IC MCU 16BIT 64K IR MOD 64LQFP
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ622G-0000+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, Infrared, Power-Fail, POR, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: MAXQ622
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 2
• Operating Supply Voltage: 1.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MAXQUSBJTAG-KIT MAXQ622-KIT
• Minimum Operating Temperature: 0 C
• For Use With: MAXQ622-KIT# - EVALUATION KIT FOR MAXQ622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

16-Bit Microcontrollers with
Infrared Module and Optional USB
stop-mode current increases battery life over competing
microcontrollers. An integrated POR circuit with brownout
support resets the device to a known condition following a
power-up cycle or brownout condition. Additionally, a power-
fail warning flag is set, and a power-fail interrupt can be
generated when the system voltage falls below the power-
fail warning voltage, V
allows the application to notify the user that the system sup-
ply is low and appropriate action should be taken.
The MAXQ612/MAXQ622 are based on Maxim’s MAXQ20
core, which is a low-power implementation of the new
16-bit MAXQ family of RISC cores. The core supports
the Harvard memory architecture with separate internal
16-bit program and data address buses. A fixed 16-bit
instruction word is standard, but data can be arranged
in 8 or 16 bits. The MAXQ core is a pipelined proces-
sor with performance approaching 1MIPS per MHz.
The 16-bit data path is implemented around register
modules, and each register module contributes specific
functions to the core. The accumulator module consists
of sixteen 16-bit registers and is tightly coupled with the
arithmetic logic unit (ALU). Program flow is supported by
a configurable soft stack.
Execution of instructions is triggered by data transfer
between functional register modules or between a func-
tional register module and memory. Because data move-
ment involves only source and destination modules,
circuit switching activities are limited to active modules
only. For power-conscious applications, this approach
localizes power dissipation and minimizes switching
noise. The modular architecture also provides a maxi-
mum of flexibility and reusability that are important for a
microprocessor used in embedded applications.
The MAXQ instruction set is highly orthogonal. All arith-
metical and logical operations can use any register
in conjunction with the accumulator. Data movement
is supported from any register to any other register.
Table 1. Memory Areas and Associated Maximum Privilege Levels
18
_____________________________________________________________________________________
User Application
User Loader
Other (RAM)
Utility ROM
System
AREA
PFW
. The power-fail warning feature
Microprocessor
PAGE ADDRESS
ULDR to UAPP-1
0 to ULDR-1
UAPP to top
N/A
N/A
Memory is accessed through specific data-pointer regis-
ters with autoincrement/decrement support.
The microcontroller incorporates several memory types:
• 128KB program flash memory
• 6KB SRAM data memory
• 6KB utility ROM
• Soft stack
The optional memory-protection feature separates code
memory into three areas: system, user loader, and user
application. Code in the system area can be kept con-
fidential. Code in the user areas can be prevented from
reading and writing system code. The user loader can
also be protected from user application code.
Memory protection is implemented using privilege levels
for code. Each area has an associated privilege level.
RAM/ROM are assigned privilege levels as well. Refer to
the MAXQ622 User’s Guide for a more thorough expla-
nation of the topic.
A 16-bit-wide internal stack provides storage for pro-
gram return addresses and can also be used for general-
purpose data storage. The stack is used automatically
by the processor when the CALL, RET, and RETI instruc-
tions are executed and when an interrupt is serviced. An
application can also store values in the stack explicitly
by using the PUSH, POP, and POPI instructions.
On reset, the stack pointer, SP, initializes to the top of the
stack (BF0h). The CALL, PUSH, and interrupt-vectoring
operations decrement SP, then store a value at the loca-
tion pointed to by SP. The RET, RETI, POP, and POPI
operations retrieve the value at SP and then increment SP.
The utility ROM is a 6KB block of internal ROM memory
that defaults to a starting address of 8000h. The utility
MAXIMUM PRIVILEGE LEVEL
Memory Protection
Medium
High
High
Low
Low
Stack Memory
Utility ROM
Memory