MAXQ622G-0000+ Maxim Integrated Products, MAXQ622G-0000+ Datasheet - Page 26

• Manufacturer Part Number: MAXQ622G-0000+
• Description: IC MCU 16BIT 64K IR MOD 64LQFP
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ622G-0000+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, Infrared, Power-Fail, POR, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: MAXQ622
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 2
• Operating Supply Voltage: 1.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MAXQUSBJTAG-KIT MAXQ622-KIT
• Minimum Operating Temperature: 0 C
• For Use With: MAXQ622-KIT# - EVALUATION KIT FOR MAXQ622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Table 5. Power-Fail Detection States During Normal Operation
16-Bit Microcontrollers with
Infrared Module and Optional USB
nanopower ring-oscillator cycles. If V
detection, V
ring-oscillator period. If V
the third nanopower ring period, the CPU exits the reset
state and resumes normal operation from utility ROM at
8000h after satisfying the crystal warmup period.
26
STATE
G
A
B
C
D
H
E
F
I
_____________________________________________________________________________________
POWER-FAIL
DD
(Periodically)
(Periodically)
is monitored for an additional nanopower
On
On
On
On
On
On
On
On
Off
DD
REGULATOR
INTERNAL
remains above V
Off
On
On
On
On
Off
On
Off
Off
DD
> V
OSCILLATOR
RST
CRYSTAL
RST
Off
On
On
On
On
Off
On
Off
Off
during
for
If a reset is generated by any other event, such as the
RESET pin being driven low externally or the watchdog
timer, the power-fail, internal regulator, and crystal
remain on during the CPU reset. In these cases, the CPU
exits the reset state in less than 20 crystal cycles after
the reset source is removed.
RETENTION
SRAM
Yes
Yes
—
—
—
—
—
—
—
V
V
Crystal warmup time, t
CPU held in reset.
V
CPU normal operation.
Power drop too short.
Power-fail not detected.
V
PFI is set when V
maintains this state for at least t
which time a power-fail interrupt is gener-
ated (if enabled).
CPU continues normal operation.
V
Power-fail detected.
CPU goes into reset.
Power-fail monitor turns on periodically.
V
Crystal warmup time, t
CPU resumes normal operation from
8000h.
V
Power-fail detected.
CPU goes into reset.
Power-fail monitor turns on periodically.
V
Device held in reset. No operation allowed.
DD
POR
DD
RST
POR
DD
POR
DD
< V
> V
> V
< V
< V
< V
< V
< V
POR
RST
RST
POR
DD
DD
DD
DD
.
.
.
.
< V
< V
< V
< V
COMMENTS
PFW
RST
RST
RST
RST
.
.
.
.
< V
XTAL_RDY
XTAL_RDY
DD
< V
PFW
.
PFW
.
, at
and