MAXQ622G-0000+ Maxim Integrated Products, MAXQ622G-0000+ Datasheet - Page 20

IC MCU 16BIT 64K IR MOD 64LQFP

MAXQ622G-0000+

Manufacturer Part Number
MAXQ622G-0000+
Description
IC MCU 16BIT 64K IR MOD 64LQFP
Manufacturer
Maxim Integrated Products
Series
MAXQ™r
Datasheet

Specifications of MAXQ622G-0000+

Core Processor
RISC
Core Size
16-Bit
Speed
12MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, Infrared, Power-Fail, POR, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
MAXQ622
Core
RISC
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
44
Number Of Timers
2
Operating Supply Voltage
1.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MAXQUSBJTAG-KIT MAXQ622-KIT
Minimum Operating Temperature
0 C
For Use With
MAXQ622-KIT# - EVALUATION KIT FOR MAXQ622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
16-Bit Microcontrollers with
Infrared Module and Optional USB
The IR timer is composed of a carrier generator and a
carrier modulator. The carrier generation module uses
the 16-bit IR carrier register (IRCA) to define the high
and low time of the carrier through the IR carrier high
byte (IRCAH) and IR carrier low byte (IRCAL). The carrier
modulator uses the IR data bit (IRDATA) and IR modula-
tor time register (IRMT) to determine whether the carrier
or the idle condition is present on IRTX.
The IRCAH byte defines the carrier high time in terms of
the number of IR input clocks, whereas the IRCAL byte
defines the carrier low time.
• IR Input Clock (f
• Carrier Frequency (f
• Carrier High Time = IRCAH + 1
• Carrier Low Time = IRCAL + 1
• Carrier Duty Cycle = (IRCAH + 1)/(IRCAH + IRCAL + 2)
During transmission, the IRCA register is latched for
each IRV downcount interval, and is sampled along with
the IRTXPOL and IRDATA bits at the beginning of each
new IRV downcount interval so that duty-cycle variation
and frequency shifting is possible from one interval to the
next. The starting/idle state and the carrier polarity of the
IRTX pin can be configured when the IR timer is enabled.
During IR transmission (IRMODE = 1), the carrier gen-
erator creates the appropriate carrier waveform, while
the carrier modulator performs the modulation. The car-
rier modulation can be performed as a function of carrier
cycles or IRCLK cycles dependent on the setting of the
IRCFME bit. When IRCFME = 0, the IRV down counter is
clocked by the carrier frequency and thus the modula-
tion is a function of carrier cycles. When IRCFME = 1, the
IRV down counter is clocked by IRCLK, allowing carrier
modulation timing with IRCLK resolution.
The IRTXPOL bit defines the starting/idle state as well as
the carrier polarity for the IRTX pin. If IRTXPOL = 1, the
IRTX pin is set to a logic-high when the IR timer module is
enabled. If IRTXPOL = 0, the IRTX pin is set to a logic-low
when the IR timer is enabled.
A separate register bit, IR data (IRDATA), is used to
determine whether the carrier generator output is output
to the IRTX pin for the next IRMT carrier cycles. When
IRDATA = 1, the carrier waveform (or inversion of this
waveform if IRTXPOL = 1) is output on the IRTX pin dur-
ing the next IRMT cycles. When IRDATA = 0, the idle
20
IRCAL + 2)
_____________________________________________________________________________________
IRCLK
Carrier Generation Module
) = f
CARRIER
SYS
/2
) = f
IRDIV[1:0]
IR Transmission
IRCLK
/(IRCAH +
condition, as defined by IRTXPOL, is output on the IRTX
pin during the next IRMT cycles.
The IR timer acts as a down counter in transmit mode. An
IR transmission starts when the IREN bit is set to 1 when
IRMODE = 1; when the IRMODE bit is set to 1 when IREN
= 1; or when IREN and IRMODE are both set to 1 in the
same instruction. The IRMT and IRCA registers, along
with the IRDATA and IRTXPOL bits, are sampled at the
beginning of the transmit process and every time the IR
timer value reload its value. When the IRV reaches 0000h
value, on the next carrier clock, it does the following:
1) Reloads IRV with IRMT.
2) Samples IRCA, IRDATA, and IRTXPOL.
3) Generates IRTX accordingly.
4) Sets IRIF to 1.
5) Generates an interrupt to the CPU if enabled (IRIE = 1).
The normal transmit mode modulates the carrier based
upon the IRDATA bit. However, the user has the option
to input the modulator (envelope) on an external pin if
desired. The IRDATA bit is output directly to the IRTXM
pin (if IRTXPOL = 0) on each IRV downcount interval
boundary just as if it were being used to internally modu-
late the carrier frequency. If IRTXPOL = 1, the inverse
of the IRDATA bit is output to the IRTXM pin on the IRV
interval downcount boundaries. When the envelope
mode is enabled, it is possible to output either the modu-
lated (IRENV[1:0] = 01b) or unmodulated (INENV[1:0] =
10b) carrier to the IRTX pin.
When configured in receive mode (IRMODE = 0), the
IR hardware supports the IRRX capture function. The
IRRXSEL[1:0] bits define which edge(s) of the IRRX pin
should trigger the IR timer capture function. Once started,
the IR timer (IRV) starts up counting from 0000h when a
qualified capture event as defined by IRRXSEL happens.
The IRV register is, by default, counting carrier cycles
as defined by the IRCA register. However, the IR carrier
frequency detect (IRCFME) allows clocking of the IRV
register directly with the IRCLK for finer resolution. When
IRCFME = 0, the IRCA defined carrier is counted by IRV.
When IRCFME = 1, the IRCLK clocks the IRV register.
On the next qualified event, it does the following:
1) Captures the IRRX pin state and transfers its value
IR Transmit—Independent External Carrier
to IRDATA. If a falling edge occurs, IRDATA = 0. If a
rising edge occurs, IRDATA = 1.
and Modulator Outputs
IR Receive

Related parts for MAXQ622G-0000+