UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 516
UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(6) Power-fail compare mode register (ADA0PFM)
The ADA0PFM register is an 8-bit register that sets the power-fail compare mode.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Cautions 1. In the select mode, the 8-bit data set to the ADA0PFT register is compared with the
ADA0PFM
2. In the scan mode, the 8-bit data set to the ADA0PFT register is compared with the
3. In the following modes, write data to the ADA0PFM register while A/D conversion is
After reset:
conversion result of the channel specified by the ADA0S register. If the result matches
the condition specified by the ADA0PFC bit, the conversion result is stored in the
ADA0CRn register and the INTAD signal is generated.
conversion result is stored in the ADA0CR0 register and the INTAD signal is not
generated.
conversion result of channel 0. If the result matches the condition specified by the
ADA0PFC bit, the conversion result is stored in the ADA0CR0 register and the INTAD
signal is generated.
ADA0CR0 register but the INTAD signal is not generated. Also, regardless of the
comparison result, scanning continues after comparison and the conversion result
continue to be stored in the ADA0CRn register until scanning ends. However, the
INTAD signal is not generated after the scanning has finished.
stopped (ADA0M0.ADA0CE bit = 0), and then enable A/D conversion (ADA0CE bit = 1).
•
•
Normal conversion mode
One-shot select mode/one-shot scan mode in high-speed conversion mode
ADA0PFE
ADA0PFC
ADA0PFE
00H
0
1
0
1
<7>
ADA0PFC
R/W
Power-fail compare disabled
Power-fail compare enabled
Generate an interrupt request signal (INTAD) when ADA0CRnH ≥ ADA0PFT
Generate an interrupt request signal (INTAD) when ADA0CRnH < ADA0PFT
6
CHAPTER 14 A/D CONVERTER
Address:
User’s Manual U18953EJ5V0UD
If it does not match, the conversion result is stored in the
Selection of power-fail compare enable/disable
5
0
Selection of power-fail compare mode
FFFFF204H
4
0
3
0
2
0
If it does not match, the
1
0
0
0
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