UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 616
UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Company:
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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17.6.8 SBF transmission
and SBF transmission is started by setting the SBF transmission trigger (UC0OPT0.UC0STT bit) to 1.
AnOPT0.UC0SLS0 bits, is output. A transmission enable interrupt request signal (INTUC0T) is generated upon the
start of SBF transmission. Following the end of SBF transmission, the UC0STT bit is automatically cleared.
transmission trigger (UC0STT bit) is set.
614
When the UC0CTL0.UC0PWR bit and UC0CTL0.UC0TXE bit are 1, the transmission enabled status is entered,
Thereafter, a low level signal having a length of 13 to 20 bits, as specified by the UC0OPT0.UC0SLS2 to
Transmission is suspended until the data to be transmitted next is written to the UC0TX register, or until the SBF
TXDC0
INTUC0T
interrupt
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC) (
Setting of UC0STT bit
1
Figure 17-11. Example of SBF Transmission
2
3
User’s Manual U18953EJ5V0UD
4
5
6
7
8
9
10
11
PD70F3792, 70F3793)
12
13
Stop
bit
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