UPD70F3743GJ-GAE-AX Renesas Electronics America, UPD70F3743GJ-GAE-AX Datasheet - Page 687

• Manufacturer Part Number: UPD70F3743GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3743GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 128
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
Note To read bits 8 to 15 of the IMR0 to IMR4 registers in 8-bit or 1-bit units, specify them as bits 0 to 7 of
Caution Set bits 13 to 15 of the IMR4 register and bits 7 to 14 of the IMR3 register to 1. If the setting of
Remark
IMR0H to IMR4H registers.
IMR4 (IMR4H
IMR3 (IMR3H
IMR2 (IMR2H
IMR1 (IMR1H
IMR0 (IMR0H
these bits is changed, the operation is not guaranteed.
xx: Identification name of each peripheral unit (see Table 19-2
n:
(xxICn)).
Peripheral unit number (see Table 19-2 Interrupt Control Register (xxICn))
IMR4L
IMR3L
IMR2L
IMR1L
IMR0L
After reset: FFFFH
After reset: FFFFH
After reset: FFFFH
After reset: FFFFH
After reset: FFFFH
Note
Note
Note
Note
Note
)
)
)
)
)
TP8CCMK0
CB3RMK
TP5CCMK1
TP0CCMK0
TP3OVMK
xxMKn
ADMK
PMK8
PMK6
15
15
15
15
15
1
7
7
1
7
7
7
0
1
TP8OVMK
UA2TMK
CB2TMK CB2RMK
TP5CCMK0
TP2CCMK1
TP0OVMK
Interrupt servicing enabled
Interrupt servicing disabled
CHAPTER 19 INTERRUPT/EXCEPTION PROCESSING FUNCTION
WTMK
PMK5
14
14
14
14
14
1
6
1
6
6
6
6
R/W
R/W
R/W
R/W
R/W
TP7CCMK1
TP2CCMK0
TQ0CCMK3
TP5OVMK
WTIMK
UA2RMK/
PMK4
IICMK0
Address: IMR4 FFFFF108H,
Address: IMR3 FFFFF106H,
Address: IMR2 FFFFF104H,
Address: IMR1 FFFFF102H,
Address: IMR0 FFFFF100H,
13
13
13
13
13
1
5
1
5
5
5
5
Setting of interrupt mask flag
TP7CCMK0
TQ0CCMK2
UA3TMK
UA1TMK
CB1TMK CB1RMK CB0TMK
TP4CCMK1
TP2OVMK
KRMK
PMK3
IMR4L FFFFF108H, IMR4H FFFFF109H
IMR3L FFFFF106H, IMR3H FFFFF107H
IMR2L FFFFF104H, IMR2H FFFFF105H
IMR1L FFFFF102H, IMR1H FFFFF103H
IMR0L FFFFF100H, IMR0H FFFFF101H
12
12
12
12
12
1
4
4
4
4
4
DMAMK3 DMAMK2 DMAMK1 DMAMK0
UA3RMK
TP7OVMK TP6CCMK1 TP6CCMK0 TP6OVMK
TQ0CCMK1
TP4CCMK0
TP1CCMK1
UA1RMK/
PMK2
IIC2MK
11
11
11
11
11
1
3
3
3
3
3
CB5TMK
TQ0CCMK0
TP1CCMK0
TP4OVMK
UA0TMK/
CB4TMK
PMK1
10
10
10
10
10
2
1
2
2
2
2
Interrupt Control Register
TQ0OVMK
CB5RMK
TP3CCMK1
TP1OVMK
UA0RMK/
CB4RMK
CB0RMK/
PMK0
IICMK1
9
1
1
1
1
1
1
9
9
9
9
TP8CCMK1
CB3TMK
TM0EQMK0
TP3CCMK0
TP0CCMK1
LVIMK
PMK7
0
1
8
8
0
8
0
8
0
8
0
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