SAF-XC161CJ-16F40F BB Infineon Technologies, SAF-XC161CJ-16F40F BB Datasheet - Page 21

• Manufacturer Part Number: SAF-XC161CJ-16F40F BB
• Description: IC MCU 16BIT 128KB FLSH 144TQFP
• Manufacturer: Infineon Technologies
• Series: XC16xr

Specifications of SAF-XC161CJ-16F40F BB

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SLDM, SPI, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 99
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.7 V
• Data Converters: A/D 12x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: 2xASC, 2xSSC, 1xSDLM, 1xI2C, J1850
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 99
• Number Of Timers: 9
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Packages: PG-TQFP-144
• Max Clock Frequency: 40.0 MHz
• Sram (incl. Cache): 8.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 12
• Program Memory: 128.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

3
The architecture of the XC161 combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a very well-balanced way. In
addition, the on-chip memory blocks allow the design of compact systems-on-silicon with
maximum performance (computing, control, communication).
The on-chip memory blocks (program code-memory and SRAM, dual-port RAM, data
SRAM) and the set of generic peripherals are connected to the CPU via separate buses.
Another bus, the LXBus, connects additional on-chip resources as well as external
resources (see
This bus structure enhances the overall system performance by enabling the concurrent
operation of several subsystems of the XC161.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the XC161.
Figure 3
Data Sheet
X T A L
P 20
C hannels
C lo ck G e ne ra tio n
8/10-B it
ADC
D e b ug S u p po rt
O sc / PLL
12
6
Functional Description
O CDS
P ort 9
128 K bytes
ProgM em
PSRAM
Block Diagram
6
F lash
Figure
G P T
P 7
T 2
T 3
T 4
T 5
T 6
4
P ort 6
(U S A R T )
ASC0
B R G en
RTC
3).
8
(U S A R T )
AS C1
W DT
B R G en
P ort 5
12
SSC0
B R G en
(S P I)
P ort 4
S SC1
C166SV2-Core
8
B R G en
(S P I)
Interrupt & PE C
19
DP RAM
CPU
P ort 3
CC1
T 0
T 1
15
CC2
T 7
T 8
P ort 2
P e rip h e ra l D a ta B u s
Interrupt B us
8
B R G en
IIC
Functional Description
P O R T 1
SDLM
16
X B U S C o ntrol
E xternal B us
XC161CJ-16F
DSRAM
C on trol
EBC
Derivatives
M C B 04323_x1.vsd
V2.4, 2006-08
P O R T 0
Tw in
CAN
A
16
B