SAF-TC1167-128F133HL AD Infineon Technologies, SAF-TC1167-128F133HL AD Datasheet - Page 4
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
SAF-TC1167-128F133HL AD
Manufacturer Part Number
SAF-TC1167-128F133HL AD
Description
IC MCU 32BIT FLASH 176-LQFP
Manufacturer
Infineon Technologies
Series
TC116xr
Specifications of SAF-TC1167-128F133HL AD
Core Processor
TriCore
Core Size
32-Bit
Speed
133MHz
Connectivity
ASC, CAN, EBI/EMI, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
88
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 32x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFQFP
Data Bus Width
32 bit
Data Ram Size
104 KB
Interface Type
ASC, MLI, MSC, SSC
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
88
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (12 bit, 16 Channel) / 10 bit, 4 Channel
Packages
PG-LQFP-176
Max Clock Frequency
133.0 MHz
Sram (incl. Cache)
128.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
1.0 MB
For Use With
B158-H8690-X-0-7600IN - KIT STARTER TC116X SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
SP000602800
TC1167 Data Sheet
Revision History: V1.3, 2009-10
Previous Version: V0.1
Page
4
24
28
54
54
84
88
88
96
104
105
106
98
104
118
Trademarks
TriCore® is a trademark of Infineon Technologies AG.
Data Sheet
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send your proposal (including a reference to this document) to:
mcdocu.comments@infineon.com
Subjects (major changes since last revision)
Typo of TTCAN-related text is deleted from the MultiCAN features.
Text which describes the endurance of PFlash and DFlash is enhanced
The text in the Data Access Overlay is enhanced
Input spike-filter is added to PORST.
A footnote is added to
The spike-filters parameters are included,
The maximum limit for
Footnote regarding switch capacitance at analog input is updated.
The temperature sensor measurement time parameter is added.
The condition for HWCFG is deleted from hold time from PORST rising
edge.
The power, pad, reset timing figure is updated.
The notes under the PLL section is updated
I
updated.
Footnotes for application reset boot time,
The method used for the specified thermal resistance values is
included.
DD
at 80MHz for Infineon Power Loop and text for test condition are
V
I
OZ1
DDMF
is updated.
t
t
B
SF1
are enhanced.
, t
SF2
V1.3, 2009-10
TC1167