PIC17C756-16/L Microchip Technology, PIC17C756-16/L Datasheet - Page 38
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PIC17C756-16/L
Manufacturer Part Number
PIC17C756-16/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-16/L
Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 38 of 321
- Download datasheet (3Mb)
EXAMPLE 6-2:
DS30264A-page 38
; The addresses that are used to store the CPUSTA and WREG values must be in the data memory
; address range of 1Ah - 1Fh. Up to 6 locations can be saved and restored using the MOVFP
; instruction. This instruction neither affects the status bits, nor corrupts the WREG register.
; This routine uses the FRS0, so it controls the FS1 and FS0 bits in the ALUSTA register.
;
Nobank_FSR
Bank_FSR
ALU_Temp
WREG_TEMP
BSR_S1
BSR_S2
BSR_S3
BSR_S4
BSR_S5
BSR_S6
;
INITIALIZATION
;
INIT_POINTERS
PUSH
POP
;
CALL
CLRF
CLRF
BSF
CLRF
MOVLW
MOVWF
MOVWF
MOVLW
MOVWF
:
:
:
:
BSF
BCF
MOVFP
CLRF
MOVPF
MOVPF
MOVPF
MOVFP
MOVFP
MOVFP
MOVFP
MOVPF
MOVFP
;
:
;
CLRF
MOVFP
DECF
MOVFP
MOVFP
BSF
MOVPF
MOVPF
DECF
MOVFP
MOVFP
MOVFP
RETFIE
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
CLEAR_RAM
BSR, F
ALUSTA, F
ALUSTA, FS1
WREG, F
BSR_S1
FSR0
Nobank_FSR
0x20
Bank_FSR
ALUSTA, FS0
ALUSTA, FS1
BSR, INDF0
BSR, F
ALUSTA, ALU_Temp
FSR0, Nobank_FSR
WREG, WREG_TEMP
Bank_FSR, FSR0
ALU_Temp, INDF0
WREG_TEMP, INDF0
PCLATH, INDF0
FSR0, Bank_FSR
Nobank_FSR, FSR0
ALUSTA, F
Bank_FSR, FSR0
FSR0, F
INDF0, PCLATH
INDF0, WREG
ALUSTA, FS1
INDF0, ALU_Temp
FSR0, Bank_FSR
Nobank_FSR, F
Nobank_FSR, FSR0
ALU_Temp, ALUSTA
INDF0, BSR
SAVING STATUS AND WREG IN RAM (NESTED)
0x40
0x41
0x42
0x43
0x01A
0x01B
0x01C
0x01D
0x01E
0x01F
; 1st location to save BSR
; 2nd location to save BSR (Label Not used in program)
; 3rd location to save BSR (Label Not used in program)
; 4th location to save BSR (Label Not used in program)
; 5th location to save BSR (Label Not used in program)
; 6th location to save BSR (Label Not used in program)
;
; Must Clear all Data RAM
; Must Initialize the pointers for POP and PUSH
; Set All banks to 0
; FSR0 post increment
; Clear WREG
; Load FSR0 with 1st address to save BSR
; Your code
; At Interrupt Vector Address
; FSR0 has auto-increment, does not affect status bits
; does not affect status bits
; No Status bits are affected
; Periperal and Data RAM Bank 0 No Status bits are affected
;
; Save the FSR for BSR values
;
; Restore FSR value for other values
; Push ALUSTA value
; Push WREG value
; Push PCLATH value
; Restore FSR value for other values
;
; Interrupt Service Routine (ISR) code
; FSR0 has auto-decrement, does not affect status bits
; Restore FSR value for other values
;
; Pop PCLATH value
; Pop WREG value
; FSR0 does not change
; Pop ALUSTA value
; Restore FSR value for other values
;
; Save the FSR for BSR values
;
; No Status bits are affected
; Return from interrupt (enable interrupts)
Preliminary
1997 Microchip Technology Inc.
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