PIC17C756-16I/L Microchip Technology, PIC17C756-16I/L Datasheet - Page 67

• Manufacturer Part Number: PIC17C756-16I/L
• Description: MICRO CTRL 16K MEMORY OTP 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C756-16I/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -

TABLE 10-1:
TABLE 10-2:
Address
RA0/INT
RA1/T0CKI
RA2/SS/SCL
RA3/SDI/SDA
RA4/RX1/DT1
RA5/TX1/CK1
RBPU
Legend: ST = Schmitt Trigger input.
10h, Bank 0
05h, Unbanked
13h, Bank 0
15h, Bank 0
Legend: x = unknown, u = unchanged, - = unimplemented reads as '0'. Shaded cells are not used by PORTA.
Note 1:
1997 Microchip Technology Inc.
Name
Other (non power-up) resets include: external reset through MCLR and the Watchdog Timer Reset.
Name
PORTA
T0STA
RCSTA1
TXSTA1
PORTA FUNCTIONS
REGISTERS/BITS ASSOCIATED WITH PORTA
Bit0
bit0
bit1
bit2
bit3
bit4
bit5
bit7
INTEDG
CSRC
RBPU
SPEN
Bit 7
Buffer
Type
ST
ST
ST
ST
ST
ST
—
T0SE
Bit 6
RC9
TX9
—
Input or external interrupt input.
Input or clock input to the TMR0 timer/counter, and/or an external interrupt
input.
Input/Output or slave select input for the SPI or clock input for the I
Output is open drain type.
Input/Output or data input for the SPI or data for the I
Output is open drain type.
Input/Output or USART1 Asynchronous Receive or
USART1 Synchronous Data.
Input/Output or USART1 Asynchronous Transmit or
USART1 Synchronous Clock.
Control bit for PORTB weak pull-ups.
TX1/CK1
SREN
T0CS
TXEN
Bit 5
RA5/
RX1/DT1
CREN
SYNC
Bit 4
RA4/
Preliminary
PS3
SDI/SDA
Bit 3
RA3/
PS2
—
—
SS/SCL
FERR
Bit 2
RA2/
PS1
—
Function
RA1/T0CKI
OERR
TRMT
Bit 1
PS0
RA0/INT
RC9D
TX9D
Bit 0
—
2
C bus.
0-xx xxxx
0000 000-
0000 -00x
0000 --1x
Value on
POR,
BOR
DS30264A-page 67
2
C bus.
0-uu uuuu
0000 000-
0000 -00u
0000 --1u
Value on
all other
(Note1)
resets