ATMEGA163-8PC Atmel, ATMEGA163-8PC Datasheet - Page 100

• Manufacturer Part Number: ATMEGA163-8PC
• Description: IC AVR MCU 16K A/D 8MHZ 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 36. Status Codes for Miscellaneous States
TWI Include File
100
Status Code
(TWSR)
$F8
$00
ATmega163(L)
Status of the Two-wire Serial
Bus and Two-wire Serial Inter-
face hardware
No relevant state information
available; TWINT = “0”
Bus error due to an illegal
START or STOP condition
wait17:in
Transmitter mode
To/from TWDR
No TWDR action
No TWDR action
;***** General Master staus codes *****
.equ
transmitted
.equ
transmitted
;***** Master Transmitter staus codes *****
.equ
.equ
.equ
.equ
received
.equ
;***** Master Receiver staus codes *****
.equ
.equ
.equ
.equ
.equ
;***** Slave Transmitter staus codes *****
.equ
.equ
.equ
sbrs
rjmp
in
cpi
brne
ldi
out
START
REP_START
MT_SLA_ACK
MT_SLA_NACK
MT_DATA_ACK
MT_DATA_NACK
MT_ARB_LOST
MR_ARB_LOST
MR_SLA_ACK
MR_SLA_NACK
MR_DATA_ACK
MR_DATA_NACK
ST_SLA_ACK
ST_ARB_LOST_SLA_ACK=$B0;Arbitration lost in SLA+R/W as Master. Own
ST_DATA_ACK
Application Software Response
r16,TWCR
r16, TWINT ; data has been transmitted, and ACK/NACK has
wait17
r16, TWSR
r16, ST_LAST_DATA ; different from ST_LAST_DATA, go to ERROR
ERROR
r16, (1<<TWINT) | (1<<TWEA) | (1<<TWEN)
TWCR, r16
STA
0
No TWCR action
STO
1
=$18
=$20
=$28
=$30
=$38
=$38
=$40
=$48
=$50
=$58
=$A8
=$B8
To TWCR
; be received after data byte Master signalling end
; of transmission)
; Wait for TWINT flag set. This indicates that
; been received
; Check value of TWI Status Register. If status
; Continue address reckognition in Slave
TWINT
=$08
=$10
1
;SLA+W has been tramsmitted and ACK received
;SLA+W has been tramsmitted and NACK received
;Data byte has been tramsmitted and ACK
;received
;Data byte has been tramsmitted and NACK
;Arbitration lost in SLA+W or data bytes
;Arbitration lost in SLA+R or NACK bit
;SLA+R has been tramsmitted and ACK received
;SLA+R has been tramsmitted and NACK received
;Data byte has been received and ACK returned
;Data byte has been received and NACK
; tramsmitted
;Own SLA+R has been received and ACK returned
; SLA+W has been received and ACK returned
;Data byte has been tramsmitted and ACK
;received
TWEA
X
Next Action Taken by Two-wire Serial Interface Hard-
ware
Wait or proceed current transfer
Only the internal hardware is affected, no STOP condi-
tion is sent on the bus. In all cases, the bus is released
and TWSTO is cleared.
;Repeated START has been
;START has been
1142E–AVR–02/03