ATMEGA163-8PC Atmel, ATMEGA163-8PC Datasheet - Page 92

• Manufacturer Part Number: ATMEGA163-8PC
• Description: IC AVR MCU 16K A/D 8MHZ 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 33. Status Codes for Master Receiver Mode
92
Status Code
(TWSR)
$08
$10
$38
$40
$48
$50
$58
ATmega163(L)
Status of the Two-wire Serial
Bus and Two-wire Serial Inter-
face hardware
A START condition has been
transmitted
A repeated START condition
has been transmitted
Arbitration lost in SLA+R or
NOT ACK bit
SLA+R has been transmitted;
ACK has been received
SLA+R has been transmitted;
NOT ACK has been received
Data byte has been received;
ACK has been returned
Data byte has been received;
NOT ACK has been returned
Figure 53. Formats and States in the Master Receiver Mode
Successfull
Reception
From a Slave
Receiver
Next Transfer
Started with a
Repeated Start
Condition
Not Acknowledge
Received After the
Slave Address
Arbitration Lost in Slave
Address or Data Byte
Arbitration Lost and
Addressed as Slave
To/from TWDR
Load SLA+R
Load SLA+R or
Load SLA+W
No TWDR action or
No TWDR actio
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action or
No TWDR action
Read data byte or
Read data byte
Read data byte or
Read data byte or
Read data byte
From Master to Slave
From Slave to Master
$08
S
Application Software Response
SLA
STA
X
X
X
0
1
0
0
1
0
1
0
0
1
0
1
R
STO
MR
0
0
0
0
0
0
0
1
1
0
0
0
1
1
0
To TWCR
A or A
DATA
$40
$48
$38
$68
A
A
A
TWINT
$78
Other Master
Other Master
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
n
Continues
Continues
P
$B0
DATA
TWEA
A
X
X
X
X
X
0
1
X
X
X
0
1
X
X
X
Any Number of Data Bytes
and their Associated Acknowledge Bits
This Number (Contained in TWSR) Corresponds
to a Defined State of the Two-wire Serial Bus
Next Action Taken by Two-wire Serial Interface Hard-
ware
SLA+R will be transmitted
ACK or NOT ACK will be received
SLA+R will be transmitted
ACK or NOT ACK will be received
SLA+W will be transmitted
Logic will switch to Master Transmitter mode.
Two-wire Serial Bus will be released and not addressed
Slave mode will be entered
A START condition will be transmitted when the bus
becomes free
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO Flag
will be Reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be Reset
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO Flag
will be Reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be Reset
$50
$38
To corresponding
states in slave mode
A
A
Other Master
DATA
Continues
$58
A
$10
P
S
1142E–AVR–02/03
SLA
W
R
MT