ATMEGA163-8PC Atmel, ATMEGA163-8PC Datasheet - Page 143

• Manufacturer Part Number: ATMEGA163-8PC
• Description: IC AVR MCU 16K A/D 8MHZ 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Program and Data
Memory Lock Bits
1142E–AVR–02/03
The ATmega163 provides six Lock bits which can be left unprogrammed (“1”) or can be
programmed (“0”) to obtain the additional features listed in Table 55. The Lock bits can
only be erased to “1” with the Chip Erase command.
Table 55. Lock Bit Protection Modes
Note:
BLB0 mode
BLB1 mode
LB mode
1
2
3
1
2
3
4
1
2
3
4
Memory Lock Bits
1. Program the Fuse bits before programming the Lock bits.
sbrc
rjmp
ret
BLB01
BLB11
LB1
1
0
0
1
0
0
1
1
0
0
1
temp1, SPMEN
Wait_spm
BLB02
BLB12
LB2
1
1
0
1
1
0
0
1
1
0
0
Protection Type
No memory lock features enabled for Parallel and Serial
Programming.
Further programming of the Flash and EEPROM is
disabled in Parallel and Serial Programming mode. The
Fuse bits are locked in both Serial and Parallel
Programming mode.
Further programming and verification of the Flash and
EEPROM is disabled in Parallel and Serial Programming
mode. The Fuse bits are locked in both Serial and Parallel
Programming mode.
No restrictions for SPM, LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section.
LPM executing from the Boot Loader section is not
allowed to read from the Application section.
No restrictions for SPM, LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section,
and LPM executing from the Application section is not
allowed to read from the Boot Loader section. If code
executed from the Boot Section, the interrupts are
disabled when BLB12 is programmed.
LPM executing from the Application section is not allowed
to read from the Boot Loader section. If code executed
from the Boot Section, the interrupts are disabled when
BLB12 is programmed.
(1)
(1)
ATmega163(L)
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