ATMEGA163-8PC Atmel, ATMEGA163-8PC Datasheet - Page 139

• Manufacturer Part Number: ATMEGA163-8PC
• Description: IC AVR MCU 16K A/D 8MHZ 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

EEPROM Write Prevents
Writing to SPMCR
Addressing the Flash During
Self-Programming
1142E–AVR–02/03
The algorithm for reading the Fuse Low bits is similar to the one described above for
reading the Lock bits. To read the Fuse Low bits, load the Z-pointer with $0000 and set
the BLBSET and SPMEN bits in SPMCR. When an LPM instruction is executed within
five cycles after the BLBSET and SPMEN bits are set in the SPMCR, the value of the
Fuse Low bits will be loaded in the destination register as shown below.
Similarly, when reading the Fuse High bits, load $0003 in the Z-pointer. When an LPM
instruction is executed within five cycles after the BLBSET and SPMEN bits are set in
the SPMCR, the value of the Fuse High bits will be loaded in the destination register as
shown below.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that
are unprogrammed, will be read as one.
In all cases, the read value of unused bit positions are undefined.
Note that an EEPROM write operation will block all software programming to Flash.
Reading the Fuses and Lock bits from software will also be prevented during the
EEPROM write operation. It is recommended that the user checks the status bit (EEWE)
in the EECR Register and verifies that the bit is cleared before writing to the SPMCR
Register. If EEPROM writing is performed inside an interrupt routine, the user software
should disable that interrupt before checking the EEWE status bit.
The Z-pointer is used to address the SPM commands.
Z15:Z14 always ignored
Z13:Z7
Z6:Z1
Z0
The only operation that does not use the Z-pointer is Setting the Boot Loader Lock bits.
The content of the Z-pointer is ignored and will have no effect on the operation.
Note that the Page Erase and Page Write operation is addressed independently. There-
fore it is of major importance that the Boot Loader software addresses the same page in
both the page erase and page write operation.
The LPM instruction also uses the Z-pointer to store the address. Since this instruction
addresses the Flash byte-by-byte, also the LSB (bit Z0) of the Z-pointer is used. See
page 15 for a detailed description.
Bit
Rd
Bit
Rd
Bit
Rd
Bit
ZH (R31)
ZL (R30)
word select, for filling temp buffer (must be zero during page write operation)
should be zero for all SPM commands, byte select for the LPM instruction.
page select, for page erase and page write
BODLEVEL
Z15
7
–
15
Z7
7
–
7
7
6
–
Z14
Z6
14
BODEN
6
–
6
6
BLB12
5
–
Z13
Z5
SPIEN
13
5
5
5
4
–
BLB11
Z12
12
Z4
4
4
4
–
3
–
BLB02
CKSEL3
Z11
11
Z3
3
3
3
BOOTSZ1
2
BLB01
CKSEL2
Z10
Z2
10
2
2
2
ATmega163(L)
BOOTSZ0
CKSEL1
1
LB2
Z9
Z1
1
9
1
1
BOOTRST
CKSEL0
LB1
Z8
Z0
0
0
8
0
0
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