PIC18LF448-I/L Microchip Technology, PIC18LF448-I/L Datasheet - Page 289
![IC PIC MCU FLASH 8KX16 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC18LF448-I/L
Manufacturer Part Number
PIC18LF448-I/L
Description
IC PIC MCU FLASH 8KX16 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Specifications of PIC18LF448-I/L
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Controller Family/series
PIC18
No. Of I/o's
33
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
33
Number Of Timers
4 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF448-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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25.2
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
© 2006 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Instruction Set
W
W
Q1
=
=
ADD Literal to W
[ label ] ADDLW
0
(W) + k
N, OV, C, DC, Z
The contents of W are added to the 8-bit
literal ‘k’ and the result is placed in W.
1
1
0x10
0x25
literal ‘k’
ADDLW
0000
k
Read
Q2
255
W
0x15
1111
Process
Data
Q3
k
kkkk
Write to W
Q4
kkkk
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
REG
W
REG
Q1
=
=
=
=
register ‘f’
ADD W to f
[ label ] ADDWF
0
d
a
(W) + (f)
N, OV, C, DC, Z
Add W to register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default). If ‘a’ is ‘0’, the Access Bank
will be selected. If ‘a’ is ‘1’, the BSR is
used.
1
1
ADDWF
Read
0010
Q2
f
[0,1]
[0,1]
0x17
0xC2
0xD9
0xC2
255
PIC18FXX8
dest
01da
REG, W
Process
Data
Q3
DS41159E-page 287
f [,d [,a]]
ffff
destination
Write to
Q4
ffff
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