ATMEGA169V-8MI Atmel, ATMEGA169V-8MI Datasheet - Page 354
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ATMEGA169V-8MI
Manufacturer Part Number
ATMEGA169V-8MI
Description
IC MCU AVR 16K 1.8V 1MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169V-8MI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA169V-1MI
ATMEGA169V-1MI
ATMEGA169V-1MI
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Changes from Rev.
2514J-12/03 to Rev.
2514K-04/04
Changes from Rev.
2514I-09/03 to Rev.
2514J-12/03
Changes from Rev.
2514H-05/03 to Rev.
2514I-09/03
354
ATmega169/V
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Renamed “Using the Power Reduction Register” to “Supply Current of I/O
modules” on page 310.
Updated “Register Summary” on page 339.
Updated “Ordering Information” on page 346.
Updated Figure 83 on page 194, Figure 91 on page 201, and Figure 123 on
page 277.
Changed size from 0x60 to 0xFF in “Stack Pointer” on page 11.
Updated Table 17 on page 40, Table 21 on page 44 and Table 115 on page
265.
Updated “Calibrated Internal RC Oscillator” on page 27.
Added new “Power Reduction Register” on page 34.
Examples found in “Supply Current of I/O modules” on page 310.
Fixed typo in port description for the “Analog to Digital Converter” on
page 193.
Removed old and added new “LCD Controller” on page 210.
Updated “Electrical Characteristics” on page 298.
Updated “ATmega169 Typical Characteristics” on page 305.
Updated “Ordering Information” on page 346.
ATmega169L replaced by ATmega169V and ATmega169.
Updated “Calibrated Internal RC Oscillator” on page 27
Removed “Advance Information” from the datasheet.
Removed AGND from Figure 2 on page 3 and added “System Clock
Prescaler” to Figure 11 on page 23.
Updated Table 16 on page 38, Table 17 on page 40, Table 19 on page 42
and Table 41 on page 72.
Renamed and updated “On-chip Debug System” to “JTAG Interface and
On-chip Debug System” on page 36.
Updated COM01:0 to COM0A1:0 in “Timer/Counter Control Register A –
TCCR0A” on page 89 and COM21:0 to COM2A1:0 in “Timer/Counter
Control Register A– TCCR2A” on page 135.
Updated “Test Access Port – TAP” on page 226 regarding JTAGEN.
Updated description for the JTD bit on page 235.
Added a note regarding JTAGEN fuse to Table 119 on page 268.
Updated Absolute Maximum Ratings* and DC Characteristics in
“Electrical Characteristics” on page 298.
Updated “Errata” on page 349 and added a proposal for solving problems
regarding the JTAG instruction IDCODE.
2514P–AVR–07/06
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