MC68HC908AS60CFN Freescale Semiconductor, MC68HC908AS60CFN Datasheet - Page 238

• Manufacturer Part Number: MC68HC908AS60CFN
• Description: IC MCU 60K FLASH 8MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908AS60CFN

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Serial Communications Interface (SCI)
17.5.3.6 Receiver Wakeup
Technical Data
So that the MCU can ignore transmissions intended only for other
receivers in multiple-receiver systems, the receiver can be put into a
standby state. Setting the receiver wakeup bit, RWU, in SCC2 puts the
receiver into a standby state during which receiver interrupts are
disabled.
Depending on the state of the WAKE bit in SCC1, either of two
conditions on the RxD pin can bring the receiver out of the standby state:
For an 8-bit character, data sampling of the stop bit takes the receiver
9 bit times
With the misaligned character shown in
counts 154 RT cycles at the point when the count of the transmitting
device is 10 bit times
The maximum percent difference between the receiver count and the
transmitter count of a fast 8-bit character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times
With the misaligned character shown in
counts 170 RT cycles at the point when the count of the transmitting
device is 11 bit times
The maximum percent difference between the receiver count and the
transmitter count of a fast 9-bit character with no errors is
•
Freescale Semiconductor, Inc.
For More Information On This Product,
Address mark — An address mark is a logic 1 in the most
significant bit position of a received character. When the WAKE bit
is set, an address mark wakes the receiver from the standby state
by clearing the RWU bit. The address mark also sets the SCI
receiver full bit, SCRF. Software can then compare the character
containing the address mark to the user-defined address of the
Serial Communications Interface (SCI)
Go to: www.freescale.com
16 RT cycles + 10 RT cycles = 154 RT cycles.
16 RT cycles + 10 RT cycles = 170 RT cycles.
154 160
------------------------- -
170 176
------------------------- -
154
170
16 RT cycles = 160 RT cycles.
16 RT cycles = 176 RT cycles.
–
–
100
100
=
=
3.90%
3.53%
Figure
Figure
MC68HC908AS60 — Rev. 1.0
17-8, the receiver
17-8, the receiver