MC68HC908GR8CDW Freescale Semiconductor, MC68HC908GR8CDW Datasheet - Page 378

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MC68HC908GR8CDW

Manufacturer Part Number
MC68HC908GR8CDW
Description
IC MCU 8K FLASH 8MHZ 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GR8CDW

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
17
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Electrical Specifications
23.12 ADC Characteristics
Technical Data
378
Supply voltage
Input voltages
Resolution
Absolute accuracy
ADC internal clock
Conversion range
Power-up time
Conversion time
Sample time
Zero input reading
Full-scale reading
Input capacitance
Input leakage
1. V
2. Source impedances greater than 10 k adversely affect internal RC charging time during input sampling.
3. Zero-input/full-scale reading requires sufficient decoupling measures for accurate conversions.
4. The external system error caused by input leakage current is approximately equal to the product of R source and input
(V
5 V
Port B
Notes:
current.
REFL
DD
= 5.0 Vdc
10%)
= 0 V, V
Characteristic
(2)
(4)
DDAD
10%, V
(3)
(3)
= V
SS
REFH
= 0 Vdc, V
(1)
Freescale Semiconductor, Inc.
=
For More Information On This Product,
DDAD
= 5.0 Vdc 10%, V
Go to: www.freescale.com
Electrical Specifications
Symbol
V
V
t
f
C
ADPU
t
Z
R
t
F
B
A
DDAD
ADIC
ADC
ADS
ADIN
ADI
ADI
ADI
AD
AD
AD
V
(V
min)
Min
2.7
0.5
REFL
FE
16
16
00
0
8
5
SSAD
DD
= 0 Vdc, V
V
V
(20) 8
1.048
max)
(V
Max
DDAD
REFH
5.5
FF
17
01
8
DD
1
1
REFH
t
t
AIC
AIC
= 5.0 Vdc 10%, V
cycles
MHz
Unit
LSB
Bits
Hex
Hex
t
AIC
pF
cycles
cycles
V
V
V
A
MC68HC908GR8 — Rev 4.0
V
Includes quantization
to the same potential
t
as V
AIC
DDAD
V
V
V
only at 1 MHz
ADIN
REFH
V
= 1/f
REFL
V
Comments
DD
Not tested
REFL
IN
IN
should be tied
traces.
via separate
= V
= V
<= V
ADIC
= V
MOTOROLA
= V
= 0
REFH
REFL
, tested
DDAD
SSAD
REFH

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