MC68HC908AP64CB Freescale Semiconductor, MC68HC908AP64CB Datasheet - Page 258

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MC68HC908AP64CB

Manufacturer Part Number
MC68HC908AP64CB
Description
IC MCU 64K FLASH 8MHZ 42SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908AP64CB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
30
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
For Use With
DEMO908AP64E - BOARD DEMO FOR 908AP64DEMO908AP64 - BOARD DEMO FOR 908AP64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Analog-to-Digital Converter (ADC)
In right justified mode the ADRH0 holds the two MSBs, and the ADRL0 holds the eight least significant
bits (LSBs), of the 10-bit result. ADRH0 and ADRL0 are updated each time a single channel ADC
conversion completes. Reading ADRH0 latches the contents of ADRL0. Until ADRL0 is read all
subsequent ADC results will be lost. (See
In left justified mode the ADRH0 holds the eight most significant bits (MSBs), and the ADRL0 holds the
two least significant bits (LSBs), of the 10-bit result. The ADRH0 and ADRL0 are updated each time a
single channel ADC conversion completes. Reading ADRH0 latches the contents of ADRL0. Until ADRL0
is read all subsequent ADC results will be lost. (See
Mode.)
In left justified sign mode the ADRH0 holds the eight MSBs with the MSB complemented, and the ADRL0
holds the two least significant bits (LSBs), of the 10-bit result. The ADRH0 and ADRL0 are updated each
time a single channel ADC conversion completes. Reading ADRH0 latches the contents of ADRL0. Until
ADRL0 is read all subsequent ADC results will be lost. (See
Justified Sign Data
256
$0059
$005A
$0059
$005A
$005A
Addr.
Addr.
$0059
Addr.
ADC Data Register High 0
ADC Data Register High 0
ADC Data Register High 0
ADC Data Register Low 0
ADC Data Register Low 0
ADC Data Register Low 0
Register Name
Register Name
Register Name
Mode.)
(ADRH0)
(ADRH0)
(ADRH0)
(ADRL0)
(ADRL0)
(ADRL0)
Figure 15-5. ADRH0 and ADRL0 in 8-Bit Truncated Mode
Figure 15-6. ADRH0 and ADRL0 in Right Justified Mode
Figure 15-7. ADRH0 and ADRL0 in Left Justified Mode
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Read:
Read:
Write:
Write:
MC68HC908AP Family Data Sheet, Rev. 4
Bit 7
Bit 7
Bit 7
AD9
AD7
AD9
AD1
R
R
R
R
R
R
0
0
0
0
0
0
0
0
Figure 15-6 . ADRH0 and ADRL0 in Right Justified
AD8
AD6
AD8
AD0
R
R
R
R
R
R
6
0
0
0
6
0
0
0
6
0
0
Figure 15-7 . ADRH0 and ADRL0 in Left Justified
AD7
AD5
AD7
R
R
R
R
R
R
5
0
0
0
5
0
0
0
5
0
0
0
Figure 15-8 ADRH0 and ADRL0 in Left
AD6
AD4
AD6
R
R
R
R
R
R
4
0
0
0
4
0
0
0
4
0
0
0
AD5
AD3
AD5
R
R
R
R
3
0
0
0
3
0
0
0
R
R
3
0
0
0
AD4
AD2
AD4
R
R
R
R
2
0
0
0
2
0
0
0
R
R
2
0
0
0
Freescale Semiconductor
AD3
AD9
AD1
AD3
R
R
R
R
1
0
0
0
1
0
0
R
R
1
0
0
0
Mode.)
Bit 0
Bit 0
AD2
AD8
AD0
Bit 0
AD2
R
R
R
R
0
0
0
0
0
R
R
0
0
0

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