HD6412332VFCBL25 Renesas Electronics America, HD6412332VFCBL25 Datasheet - Page 195

IC H8S MCU ROMLESS 144-QFP

HD6412332VFCBL25

Manufacturer Part Number
HD6412332VFCBL25
Description
IC H8S MCU ROMLESS 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of HD6412332VFCBL25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
2.2.52 (3)
ROTR (ROTate Right)
Operation
Rd (right rotation)
Assembly-Language Format
ROTR.W Rd
Operand Size
Word
Description
This instruction rotates the bits in a 16-bit register Rd (destination operand) one bit to the right.
The least significant bit (bit 0) is rotated to the most significant bit (bit 15), and also copied to the
carry flag.
Available Registers
Rd: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Notes
Register direct
Addressing
Mode
ROTR (W)
Mnemonic
ROTR.W
Rd
MSB
b15
Operands
Rd
. . . . . .
1st byte
1
3
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 0.
2nd byte
9
Instruction Format
cleared to 0.
cleared to 0.
Rev. 4.00 Feb 24, 2006 page 179 of 322
I
rd
UI H
LSB
Section 2 Instruction Descriptions
b0
3rd byte
U
C
N
4th byte
REJ09B0139-0400
Z
V
0
States
No. of
C
Rotate
1

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