HD6412332VFCBL25 Renesas Electronics America, HD6412332VFCBL25 Datasheet - Page 29

IC H8S MCU ROMLESS 144-QFP

HD6412332VFCBL25

Manufacturer Part Number
HD6412332VFCBL25
Description
IC H8S MCU ROMLESS 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of HD6412332VFCBL25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Section 1 CPU
Free area
SP (ER7)
Stack area
Figure 1.9 Stack
1.4.3
Control Registers
The control registers are the 24-bit program counter (PC), 8-bit extended control register (EXR),
8-bit condition-code register (CCR), and 64-bit multiply-accumulate register (MAC: H8S/2600
CPU only).
(1) Program Counter (PC)
This 24-bit counter indicates the address of the next instruction the CPU will execute. The length
of all CPU instructions is 16 bits (one word) or a multiple of 16 bits, so the least significant PC bit
is ignored. When an instruction is fetched, the least significant PC bit is regarded as 0.
(2) Extended Control Register (EXR)
This 8-bit register contains the trace bit (T) and three interrupt mask bits (I2 to I0).
Bit 7—Trace Bit (T): Selects trace mode. When this bit is cleared to 0, instructions are executed
in sequence. When this bit is set to 1, a trace exception is generated each time an instruction is
executed.
Bits 6 to 3—Reserved: These bits are reserved, always read as 1.
Bits 2 to 0—Interrupt Mask Bits (I2 to I0): These bits designate the interrupt mask level (0 to
7). For details refer to the relevant microcontroller hardware manual.
Rev. 4.00 Feb 24, 2006 page 13 of 322
REJ09B0139-0400

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