M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 275

• Manufacturer Part Number: M30802FCGP#D3
• Description: IC M16C MCU FLASH 128K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30802FCGP#D3

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
R
R
e
E
1
v
J
6
Figure 28.19 V
1 .
0
C
9
0 .
Memory expansion Mode and Microprocessor Mode
(When accessing external memory area with 2 wait, and select multiplexed bus)
8 /
CSi
ADi
/DBi
ADi
BHE
RD
CSi
ADi
/DBi
ADi
BHE
WR,WRL,
WRH
B
BCLK
ALE
BCLK
ALE
0
Read Timing
0
Write Timing
0
*2:It depends on operation frequency.
1
A
8
G
*1:It depends on operation frequency.
u
7
o r
. g
t
t
t
t
0 -
d(AD-ALE)
h(ALE-AD)
h(WR-CS)
d(DB-WR)
(m=3 and 5 when 2 wait and 3 wait, respectively.)
u
1
0
p
0
t
t
t
t
, 2
d(AD-ALE)
h(ALE-AD)
ac3(RD-DB)
ac3(AD-DB)
0
25ns.max
2
t
d(BCLK-ALE)
t
CC
25ns.max
0
d(BCLK-ALE)
=(tcyc/2-20)ns.min, t
=(tcyc/2 x m-40)ns.min
=(tcyc/2-27)ns.min
=(tcyc/2-20)ns.min, t
0
=3V timing diagram (5)
t
5
d(BCLK-CS)
25ns.max
t
t
t
t
t
25ns.max
25ns.max
d(BCLK-AD)
d(AD-ALE) *2
d(AD-ALE) *1
25ns.max
d(BCLK-CS)
d(BCLK-AD)
=(tcyc/2-27)ns.min
=(tcyc/2-20)ns.min, t
Page 262
t
=(tcyc/2 x m-55)ns.max (m=3 and 5 when 2 wait and 3 wait, respectively.)
=(tcyc/2 x n-55)ns.max (n=5 and 7 when 2 wait and 3 wait, respectively.)
ac3(AD-DB) *1
Address
Address
t
h(BCLK-ALE)
f o
t
-2ns.min
h(BCLK-ALE)
t
t
-2ns.min
h(ALE-AD) *1
h(ALE-AD) *2
3
2
h(WR-DB)
h(WR-AD)
9
h(RD-AD)
t
t
d(BCLK-WR)
d(BCLK-RD)
=(tcyc/2-20)ns.min
=(tcyc/2-20)ns.min
25ns.max
25ns.max
=(tcyc/2-20)ns.min, t
t
dz(RD-AD)
8ns.max
tcyc
tcyc
t
ac3(RD-DB) *1
t
d(DB-WR)
Measuring conditions
h(RD-CS)
*2
t
• V
• Input timing voltage
• Output timing voltage
Data output
h(BCLK-WR)
t
h(BCLK-RD)
-3ns.min
t
CC
0ns.min
su(DB-BCLK)
=(tcyc/2-20)ns.min
:Determined with V
:Determined with V
=3V±10%
Data input
40ns.min
28. Electrical characteristics
t
h(WR-CS) *2
t
t
t
t
h(WR-DB)
h(WR-AD)
h(RD-AD)
h(RD-CS) *1
t
h(RD-DB)
0ns.min
IH
OH
=1.5V, V
=1.5V, V
*1
*2
*2
t
h(BCLK-AD)
t
t
t
0ns.min
0ns.min
t
0ns.min
h(BCLK-CS)
h(BCLK-CS)
0ns.min
h(BCLK-DB)
h(BCLK-AD)
0ns.min
Vcc=3V
IL
Address
Address
OL
=0.5V
=1.5V