HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 353

MCU 3V 0K I-TEMP 100-TQFP

HD6413008VXI25

Manufacturer Part Number
HD6413008VXI25
Description
MCU 3V 0K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413008VXI25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
10.4
10.4.1
TP
timer, or address bus output is enabled, the corresponding pins cannot be used for TPC output. The
data transfer from NDR bits to DR bits takes place, however, regardless of the usage of the pin.
Pin functions should be changed only under conditions in which the output trigger event will not
occur.
10.4.2
During non-overlapping operation, the transfer of NDR bit values to DR bits takes place as
follows.
1. NDR bits are always transferred to DR bits at compare match A.
2. At compare match B, NDR bits are transferred only if their value is 0. Bits are not transferred
Figure 10.9 illustrates the non-overlapping TPC output operation.
0
if their value is 1.
to TP
TPC output pin
15
Usage Notes
Operation of TPC Output Pins
Note on Non-Overlapping Output
are multiplexed with 16-bit timer, address bus, and other pin functions. When 16-bit
DDR
Figure 10.9 Non-Overlapping TPC Output
Q
Q
NDER
Q
DR
10. Programmable Timing Pattern Controller (TPC)
C
D
Rev.4.00 Aug. 20, 2007 Page 307 of 638
Compare match A
Compare match B
Q
NDR
REJ09B0395-0400
D

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