HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 85

MCU 3V 0K I-TEMP 100-TQFP

HD6413008VXI25

Manufacturer Part Number
HD6413008VXI25
Description
MCU 3V 0K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413008VXI25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
2.6.5
The BSET, BCLR, BNOT, BST, and BIST instructions read a byte of data, modify a bit in the
byte, then write the byte back. Care is required when these instructions are used to access registers
with write-only bits, or to access ports.
Step
1
2
3
Example 1: BCLR is executed to clear bit 0 in the port 4 data direction register (P4DDR) under
the following conditions.
P4
P4
The intended purpose of this BCLR instruction is to switch P4
Operation field only
Operation field and register fields
Operation field, register fields, and effective address extension
Operation field, effective address extension, and condition field
7
5
, P4
– P4
6
:
Read
Modify
Write
0
op
:
Notes on Use of Bit Manipulation Instructions
Input pins
Output pins
op
op
Description
Read one data byte at the specified address
Modify one bit in the data byte
Write the modified data byte back to the specified address
cc
EA (disp)
Figure 2.9 Instruction Formats
op
rn
rn
EA (disp)
Rev.4.00 Aug. 20, 2007 Page 39 of 638
rm
rm
0
from output to input.
NOP, RTS, etc.
ADD.B Rn, Rm, etc.
MOV.B @(d:16, Rn), Rm
BRA d:8
REJ09B0395-0400
2. CPU

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