R5F21226JFP#U0 Renesas Electronics America, R5F21226JFP#U0 Datasheet - Page 120
![IC R8C/22 MCU FLASH 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21226JFP#U0
Manufacturer Part Number
R5F21226JFP#U0
Description
IC R8C/22 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/22r
Datasheet
1.R5F21237DFPU0.pdf
(551 pages)
Specifications of R5F21226JFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21226JFP#U0R5F21226JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21226JFP#U0R5F21226JFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 120 of 551
- Download datasheet (6Mb)
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
12.1.3
12.1.4
12.1.3.1
12.1.3.2
12.1.3.3
12.1.3.4
12.1.3.5
Special interrupts are non-maskable interrupts.
The watchdog timer interrupt is generated by the watchdog timer. For details, refer to 13. Watchdog Timer.
Oscillation Stop Detection Interrupt is generated by the oscillation stop detection function. For details of the
oscillation stop detection function, refer to 10. Clock Generation Circuit.
The voltage monitor 2 interrupt is generated by the voltage detection circuit. For details of the voltage
detection circuit, refer to 6. Voltage Detection Circuit.
Do not use the single-step interrupt. For development tools only.
The address match interrupt is generated immediately before executing an instruction that is stored into an
address indicated by the RMAD0 to RMAD1 registers when the AIER0 or AIER1 bit in the AIER register
which is set to 1 (address match interrupt enable).
For details of the address match interrupt, refer to 12.5 Address Match Interrupt.
The peripheral function interrupt is generated by the internal peripheral function of the MCU and a maskable
interrupt. Refer to Table 12.2 Relocatable Vector Tables for sources of the peripheral function interrupt. For
details of the peripheral function, refer to the description of each peripheral function.
Special Interrupts
Peripheral Function Interrupt
Watchdog Timer Interrupt
Oscillation Stop Detection Interrupt
Voltage Monitor 2 Interrupt
Single-Step Interrupt, and Address Break Interrupt
Address Match Interrupt
Page 98 of 501
12. Interrupts
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