FDMS7602S Fairchild Semiconductor, FDMS7602S Datasheet - Page 5

• Manufacturer Part Number: FDMS7602S
• Description: MOSFET N-CH 30V DUAL POWER56
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDMS7602S

• Fet Type: 2 N-Channel (Dual)
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 7.5 mOhm @ 12A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 12A, 17A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 28nC @ 10V
• Input Capacitance (ciss) @ Vds: 1750pF @ 15V
• Power - Max: 1W
• Mounting Type: Surface Mount
• Package / Case: *
• Module Configuration: Dual
• Transistor Polarity: N Channel
• Continuous Drain Current Id: 30A
• Drain Source Voltage Vds: 30V
• On Resistance Rds(on): 0.006ohm
• Rds(on) Test Voltage Vgs: 10V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDMS7602STR

©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
Typical Characteristics (Q1 N-Channel)
10
60
40
20
Figure 9. Maximum Continuous Drain
1000
8
6
4
2
0
Figure 7. Gate Charge Characteristics
0
100
25
0
0.5
10
10
1
V
Limited by Package
I
D
GS
Current vs Case Temperature
-4
= 12 A
= 4.5 V
50
T
5
C
,
Q
CASE TEMPERATURE (
V
g
, GATE CHARGE (nC)
GS
10
= 10 V
75
V
-3
DD
V
= 10 V
DD
10
Figure 11. Single Pulse Maximum Power Dissipation
= 20 V
100
R
10
V
θ
JC
o
DD
15
C )
-2
= 3.5
= 15 V
125
o
C/W
t, PULSE WIDTH (s)
150
20
10
-1
T
J
= 25°C unless otherwise noted
0.01
2000
1000
100
0.1
100
10
1
10
0.01
1
0.1
Figure 8. Capacitance vs Drain
SINGLE PULSE
T
R
T
THIS AREA IS
LIMITED BY r DS
f = 1 MHz
V
Figure 10. Forward Bias Safe
J
A
θ
GS
JA
= MAX RATED
= 25
= 0 V
= 125
o
V
V
C
0.1
DS
DS
to Source Voltage
o
, DRAIN to SOURCE VOLTAGE (V)
C/W
, DRAIN TO SOURCE VOLTAGE (V)
Operating Area
10
(
on
)
1
1
SINGLE PULSE
R
T
A
θ
JA
= 25
= 125
o
100
C
o
C/W
10
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10
1 ms
100 ms
100us
10 ms
1s
10s
DC
C
C
C
oss
iss
rss
100
1000
200
30