DSP56311VF150R2 Freescale Semiconductor, DSP56311VF150R2 Datasheet - Page 32

IC DSP 24BIT 150MHZ 196-BGA

DSP56311VF150R2

Manufacturer Part Number
DSP56311VF150R2
Description
IC DSP 24BIT 150MHZ 196-BGA
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheet

Specifications of DSP56311VF150R2

Interface
Host Interface, SSI, SCI
Clock Rate
150MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
384kB
Voltage - I/o
3.30V
Voltage - Core
1.80V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
196-MAPBGA
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
150MHz
Mips
150
Device Input Clock Speed
150MHz
Ram Size
384KB
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (min)
1.7/1.7/3/3/3/3/3/3V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSP56311VF150R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Specifications
2-12
Notes:
No.
111
112
113
114
115
116
117
118
119
WR deassertion to data high impedance
Previous RD deassertion to data active (write)
RD deassertion time
WR deassertion time
Address valid to RD assertion
RD assertion pulse width
RD deassertion to address not valid
TA set-up before RD or WR deassertion
TA hold after RD or WR deassertion
1.
2.
3.
4.
5.
WS is the number of wait states specified in the BCR. The value is given for the minimum for a given category. (For example,
for a category of [2 ≤ WS ≤ 7] timing is specified for 2 wait states.) Two wait states is the minimum otherwise.
Timings 100 and107 are guaranteed by design, not tested.
All timings for 150 MHz are measured from 0.5 × V
The WS number applies to the access in which the deassertion of WR occurs and assumes the next access uses a minimal
number of wait states.
Timing 118 is relative to the deassertion edge of RD or WR even if TA remains asserted.
Characteristics
4
Table 2-8.
5
DSP56311 Technical Data, Rev. 8
SRAM Timing (Continued)
CCQH
Symbol
to 0.5 × V
CCQH
(WS + 0.25) × T
.
0.25 × T
1.25 × T
2.25 × T
2.25 × T
3.25 × T
1.75 × T
2.75 × T
Expression
1.5 × T
2.5 × T
0.5 × T
[2 ≤ WS ≤ 7]
[2 ≤ WS ≤ 7]
[2 ≤ WS ≤ 7]
[2 ≤ WS ≤ 7]
[2 ≤ WS ≤ 7]
2.25 × T
1.25 × T
[WS ≥ 8]
[WS ≥ 8]
[WS ≥ 8]
[WS ≥ 8]
[WS ≥ 8]
C
C
C
C
C
C
C
C
C
C
− 4.0
− 4.0
− 2.8
+
− 4.0
− 4.0
− 4.0
− 4.0
C
C
4.0
4.0
1.5
C
1
− 4.0
Freescale Semiconductor
Min
11.0
17.7
14.3
12.7
11.0
11.0
7.6
6.0
0.5
4.3
3.2
0
150 MHz
Max
15.0
8.3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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