MCIMX31LCVMN4C Freescale Semiconductor, MCIMX31LCVMN4C Datasheet - Page 18

IC MPU MAP I.MX31L 473-MAPBGA

MCIMX31LCVMN4C

Manufacturer Part Number
MCIMX31LCVMN4C
Description
IC MPU MAP I.MX31L 473-MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX31r
Datasheets

Specifications of MCIMX31LCVMN4C

Core Processor
ARM11
Core Size
32-Bit
Speed
400MHz
Connectivity
1-Wire, ATA, EBI/EMI, FIR, I²C, MMC/SD, PCMCIA, SIM, SPI, SSI, UART/USART, USB, USB OTG
Peripherals
DMA, LCD, POR, PWM, WDT
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.22 V ~ 3.3 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
473-MAPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX31LCVMN4C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCIMX31LCVMN4CR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1
Electrical Characteristics
The MCIMX31C I/O parameters appear in
Ranges," on page 12
4.3.2
Figure 4
range of operating conditions appears in
Table 16
18
High-level output voltage
Low-level output voltage
High-level output current
Low-level output current
High-Level DC input voltage
Low-Level DC input voltage
Tri-state leakage current
Use of DDR Drive can result in excessive overshoot and ringing.
depicts the load circuit for outputs.
for DDR I/O (unless otherwise noted).
Output (at I/O)
AC Electrical Characteristics
Parameter
NVCC for
for temperature and supply voltage ranges.
Table 13. DDR (Double Data Rate) I/O DC Electrical Parameters
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
Figure 5. Output Transition Time Waveform
Table 13
CL includes package, probe and fixture capacitance
PA1
Figure 4. Load Circuit for Output
20%
80%
From Output
Table 14
refers to NVCC2, NVCC21, and NVCC22.
Under Test
Table 13
Symbol
Figure 5
V
V
I
V
I
V
I
OH
OL
OZ
OH
OL
IH
IL
NOTE
for slow general I/O,
I
I
for DDR (Double Data Rate). See
OH
OL
V
Test Conditions
V
I
V
depicts the output transition time waveform. The
= NVCC or GND
OH
= specified Drive
= specified Drive
OL
I
I/O = High Z
DDR Drive
DDR Drive
OH
I
High Drive
High Drive
Max Drive
Max Drive
OL
Std Drive
Std Drive
Test Point
=0.8*NVCC
=0.2*NVCC
CL
= –1 mA
= 1 mA
1
1
PA1
NVCC –0.12
0.8*NVCC
0.7*NVCC
Table 15
–10.8
–14.4
–3.6
–7.2
10.8
14.4
–0.3
Min
3.6
7.2
80%
20%
for fast general I/O, and
NVCC NVCC+0.3
Typ
NVCC
0V
Freescale Semiconductor
0
Table 7, "Operating
0.2*NVCC
0.3*NVCC
0.08
Max
±2
Units
mA
mA
μA
V
V
V
V
V
V

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