SX1441EVK Semtech, SX1441EVK Datasheet - Page 29

• Manufacturer Part Number: SX1441EVK
• Description: KIT DEV FOR SX1441
• Manufacturer: Semtech
• Series: EasyBlue™r
• Type: Bluetoothr

Specifications of SX1441EVK

• For Use With/related Products: SX1441
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Contents: -
• Other names: SX1441DVK; SX1441DVK

Personal Area Network
3.6.3 Operation
The SX1441 supports 24 sources of interrupt, divided into 3 levels of priority: high (8 sources of interrupt), middle
(8 sources of interrupt), and low (8 sources of interrupt). All sources of interrupt are sampled by the highest
frequency available in the system. A CPU interrupt is generated and memorized when an interrupt source is
triggered. The three levels of priority are directly mapped to those supported by the CoolRISC (IN0, IN1 and IN2;
see the CoolRISC documentation for more information on the interrupt processing).
RegIrqHig, RegIrqMid, and RegIrqLow are 8-bit registers containing flags for the interrupt sources. Those flags
are set when the interrupt is enabled (i.e. if the corresponding bit in the registers RegIrqEnHig, RegIrqEnMid or
RegIrqEnLow is set) and a rising edge is detected on the corresponding interrupt source.
Once memorized, an interrupt flag can be cleared by writing a ‘1’ in the corresponding bit of RegIrqHig, RegIrqMid
or RegIrqLow. Writing a ‘0’ does not modify the flag. To definitively clear the interrupt, one has to clear the
CoolRISC interrupt in the CoolRISC status register in addition to cleaning the corresponding RegIrq register. All
interrupts are automatically cleared after a reset.
Two registers are provided to facilitate the writing of interrupt service software. RegIrqPriority contains the number
of the highest priority set (its value is 0xFF when no interrupt is memorized). RegIrqIrq indicates the priority level of
the current interrupts.
© Semtech 2006
Pos
2
1
0
Pos
7
6
5
4
3
2
1
0
Pos
7:0
Pos
7:3
2
1
0
RegIrqEnLow
EnPa7
EnPa6
EnCntB
EnCntD
EnPa3
EnPa2
EnHUartFlowCtrl
EnUartFlowCtrl
RegIrqPriority
IrqPriority
RegIrqEnMid
EnWakeup
EnPa1
EnPa0
RegIrqIrq
-
HighIrqTriggered
MidIrqTriggered
LowIrqTriggered
r/w
rc1
rc1
rc1
r/w
r
r
r
r
r/w
r
r/w
rc1
rc1
rc1
rc1
rc1
rc1
rc1
rc1
Table 32 - RegIrqEnLow register
Table 33 - RegIrqPriority register
Table 31 - RegIrqEnMid register
Reset
0
0
0
Reset
00000
0
0
0
Reset
11111111
Table 34 – RegIrqIrq
Reset
0
0
0
0
0
0
0
0
Function
reserved
1 = one or more high priority interrupt have been
triggered
1 = one or more mid priority interrupt have been triggered
1 = one or more low priority interrupt have been triggered
29
Function
enable interrupt from WAKEUP pin
enable interrupt from port PA[1]
enable interrupt from port PA[0]
Function
interrupt from port PA[7]
interrupt from port PA[6]
interrupt from counter B
enable interrupt from counter D
enable interrupt from port PA[3]
enable interrupt from port PA[2]
enable interrupt from Bluetooth Sequencer UART
flow control
enable interrupt from application UART flow control
Function
Number of the highest priority interrupt set
SX1441 – Bluetooth® 1.2 SoC
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Data Sheet