SX1441EVK Semtech, SX1441EVK Datasheet - Page 44

• Manufacturer Part Number: SX1441EVK
• Description: KIT DEV FOR SX1441
• Manufacturer: Semtech
• Series: EasyBlue™r
• Type: Bluetoothr

Specifications of SX1441EVK

• For Use With/related Products: SX1441
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Contents: -
• Other names: SX1441DVK; SX1441DVK

Personal Area Network
When the capture function is active, the A and B counters can either upcount or downcount. They do count
circularly: they restart at zero or at the maximal value (either 0xFF when not cascaded or 0xFFFF when cascaded)
when respectively an overflow or an underflow condition occurs in the counting. The capture function is also active
on the counters when used to generate PWM signals.
The bits RegCntConfig2[5:4] determine if the capture function is enabled or not and selects which edges of the
capture signal source are valid for the capture operation. The source of the capture signal can be selected by
setting the RegCntConfig2[7:6] bits. For all sources; rising, falling or both, edge sensitivity can be selected.
The Table 73 shows the capture condition as a function of the setting of these configuration bits.
The bits RegCntConfig2[7:6] and RegCntConfig2[5:4] should be modified only when the counters are stopped
otherwise data may be corrupted during one counter clock cycle.
Due to the synchronization mechanism of the shadow registers and depending on the frequency ratio between the
capture and counter clocks, the interrupts may be generated one or two counter clock pulses after the effective
capture condition occurred. When the counters A and B are not cascaded and do not operate on the same clock,
the counter A and counter B interruptions which inform that the capture condition was met, may appear at different
instants. In this case, the processor should read the shadow register associated to a counter only if the interruption
related to this counter has been detected. An edge is detected on the capture signals only if the minimal pulse
widths of these signals in the low and high states are higher than a period of the counter clock source.
© Semtech 2006
RegCntConfig2[7:6]
11
10
01
00
capture signal
Selected
16 K
PA3
PA2
1 K
Table 73 – Capture conditions
RegCntConfig2[5:4]
44
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
Capture disabled
Capture disabled
Capture disabled
Capture disabled
Falling edge
Falling edge
Falling edge
Falling edge
Rising edge
Rising edge
Rising edge
Rising edge
Both edges
Both edges
Both edges
Both edges
condition
Selected
SX1441 – Bluetooth® 1.2 SoC
PA[3] rising edge
PA[3] both edges
PA[2] rising edge
PA[2] both edges
16 K falling edge
16 K rising edge
1 K falling edge
1 K rising edge
PA[3] falling
PA[2] falling
condition
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Capture
edge
edge
32 K
2 K
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-
-
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Data Sheet