XE1205SKC868XE1 Semtech, XE1205SKC868XE1 Datasheet - Page 16

KIT STARTER FOR XE1205 868MHZ

XE1205SKC868XE1

Manufacturer Part Number
XE1205SKC868XE1
Description
KIT STARTER FOR XE1205 868MHZ
Manufacturer
Semtech
Series
TrueRF™r
Type
Transceiver, ISMr
Datasheets

Specifications of XE1205SKC868XE1

Frequency
868MHz
For Use With/related Products
XE1205 (868MHz)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
The FIFO filling process is shown in detail in Figure 9. As the first byte is written into the FIFO the signal /fifoempty goes
high indicating that at least one byte is present. The microcontroller can then read the contents of the FIFO via the SPI
interface. Once all data have been read from the FIFO then /fifoempty goes low. Once the last bit of the sixteenth byte
has been written into the FIFO then the signal Fifofull is asserted; data should be read before the next byte is received.
This is illustrated in Figure 10
The /fifoempty signal can be used as an interrupt signal for a microcontroller by mapping to pin IRQ_0 if
IRQParam_RX_irq_0 is set to “10” (please refer to section 5.2.2). Alternatively, the WRITE_BYTE signal may also be
used as an interrupt if IRQParam_RX_irq_0 is set to “01”.
5.2.5.1
Demodulation in buffered mode occurs in the same way as in continuous mode (section 5.2.3.1). Received data is
directly read from the FIFO and the DATA pin is not used.
© Semtech 2008
IRQParam_Fifooverrun
15
0
/fifoempty
data
pattern
fifofull
Fifooverrun
(flag)
write_byte
“noisy” data
Demodulator in buffered mode
DCLK
DATA
PATTERN
Write_byte
/Fifoempty
Fifofull
preamble
c
.
pattern
Byte 14
b0
Figure 9: Start detection and FIFO filling
Figure 10: Completion of FIFO filling
b1
b0
b2
b1
b3
b2
Byte 15
b4
b3
16
b5
b4
b6
b5
b7
b6
b8
b7
Byte 16
Completion of FIFO filling
b8
b9
b9
b10 b11
b10
b11
b12 b13
Byte 17
b12
XE1205
b13
b14 b15
b14
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b15
b16

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