MC33596FCE Freescale Semiconductor, MC33596FCE Datasheet
MC33596FCE
Specifications of MC33596FCE
Related parts for MC33596FCE
MC33596FCE Summary of contents
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... OOK and FSK reception • 20 kbps maximum data rate using Manchester coding • supply voltage • Programmable via SPI • 6 kHz PLL frequency step © Freescale Semiconductor, Inc., 2006–2010. All rights reserved. LQFP32 RSSIOUT 1 VCC2RF 2 RFIN 3 GNDLNA 4 VCC2VCO ...
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... Embedded data processor with programmable word recognition • Image cancelling mixer • 380 kHz IF filter bandwidth • Fast wakeup time Ordering information Temperature Range –40°C to +85°C –20°C to +85°C 2 QFN Package LQFP Package MC33596FCE/R2 MC33596FJE/R2 MC33596FCAE/R2 MC33596FJAE/R2 MC33596 Data Sheet, Rev. 4 Freescale Semiconductor ...
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... Freescale Semiconductor Figure 1. Block Diagram MC33596 Data Sheet, Rev. 4 Features BAND BAND 3 ...
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... Digital interface clock I/O Digital interface enable input Digital I/O ground 2 3 5.5 V input No connection Strobe oscillator capacitor or external control input Ground 2 2.7 V power supply for analog modules for decoupling capacitor RF switch control output General ground MC33596 Data Sheet, Rev. 4 Freescale Semiconductor ...
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... ESD HBM voltage capability on each pin ESD MM voltage capability on each pin Solder heat resistance test (10 s) Storage temperature Junction temperature NOTES: 1 Human body model, AEC-Q100-002 rev Machine model, AEC-Q100-003 rev. C. Freescale Semiconductor Table 2. Maximum Ratings Symbol 1 2 MC33596 Data Sheet, Rev. 4 Maximum Ratings Value V V – ...
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... Supply voltage on VCCIN, VCCINOUT, VCCDIG for 3 V operation Supply voltage on VCCIN for 5 V operation NOTES: 1 –40°C to +85°C: MC33596FCE/FJE. –20°C to +85°C: MC33596FCAE/FJAE. The circuit can be supplied from voltage regulator or battery cell by connecting VCCIN, VCCINOUT, and VCCDIG (See connected to VCCIN; in this case VCCINOUT and VCCDIG should not be connected to VCCIN (See ...
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... All clocks running in the circuit are derived from the reference frequency provided by the crystal oscillator (frequency f , period t ). The crystal frequency is chosen in relation to the band in which the MC33596 ref ref has to operate. Table 4 shows the value of the CF bits. Freescale Semiconductor MC33596 Data Sheet, Rev. 4 Receiver Functional Description Figure 1). 7 ...
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... Example 1. Cut-off Frequency Computation Register”). MC33596 Data Sheet, Rev. 4 Dataclk F Digclk F dataclk digclk Divider (kHz) Divider (kHz) 60 282.791 30 565.582 60 293.023 30 586.047 80 296.864 40 593.728 80 302.383 40 604.767 80 302.017 40 604.035 80 318.783 40 637.565 and the value ref Freescale Semiconductor T digclk (µs) 1.77 1.71 1.68 1.65 1.66 1.57 ...
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... Data are valid on falling edges of SCLK. This means that the clock phase and polarity control bits of the microcontroller SPI have to be CPOL = 0 and CPHA = 1 (using Freescale acronyms). Table 5 summarizes the serial digital interface feature versus the selected mode. Freescale Semiconductor Section 11.3, “Receiver On/Off MC33596 Data Sheet, Rev. 4 MCU Interface Table 5) ...
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... MC33596 Digital Interface Use Figure 2 for more details about all the conditions that must digclk Figure 3 and Figure 12 Figure Startup”) for timing sequence between standy mode MC33596 Data Sheet, Rev overview is presented in for information on how to 2) and the configuration register Freescale Semiconductor ...
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... DME = 0 … and SOE = 1 … and SOE = 1 … and SOE = 1 … and SOE = 1 See See See See Figure3 Figure3 Figure3 Figure3 Freescale Semiconductor State 60 State 60 Standby/LVD Mode Standby/LVD Mode Standby/LVD Mode Standby/LVD Mode CONFB = 0, CONFB = 0, CONFB = 0, CONFB = 0, and STROBE = 1 and STROBE = 1 ...
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... For all states: At any time, a low level applied to CONFB forces the state machine to state 1, configuration mode. 12 NOTE Figure 3 shows the state diagram. STROBE = 0 State 5 Standby/LVD STROBE = 1 State 5b On Raw Data on MOSI Figure 3. Receive Mode, DME = 0, SOE = 0 MC33596 Data Sheet, Rev. 4 SPI Deselected STROBE = 0 Section 12, “Standby: LVD Freescale Semiconductor ...
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... If an even number of bytes is received, the data manager may add an extra byte. The content of this extra byte is random. If the data received do not fill an even number of bytes, the data manager will fill the last byte randomly. Figure 5 shows a typical transfer. Freescale Semiconductor Figure 4 shows the state diagram. STROBE = 0 State 0 ...
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... Recovered Clock Updated to I ncoming Signal Data Rate the Table 6. MC33596 Features versus DME Digital Interface Use Data Format Bit stream No clock when CONFB = 1 SPI master, data sent on Data bytes Recovered clock when CONFB = 1 MC33596 Data Sheet, Rev. 4 Figure 5. Output MOSI — MOSI SCLK Freescale Semiconductor ...
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... ID ID Figure 8. Example of Frame with Several IDs, No Preamble Needed For both cases, the preamble content must be defined carefully, to ensure that it will not be decoded as the ID or the header. Figure 9 defines the different preamble in OOK and FSK modulation. Freescale Semiconductor Figure 6. Example of Manchester Coding ...
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... Clock Recovery Manchester 1 Manchester 0 Symbol 0 Symbol at Data Rate (3) at Data Rate (3) Figure 9. Preamble Definition DME=1” for more details when ID is not MC33596 Data Sheet, Rev. 4 Clock Recovery Clock Recovery Manchester 1 Manchester 0 Symbol 0 Symbol at Data Rate (3) at Data Rate (3) Freescale Semiconductor ...
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... In this configuration, the receiver is controlled internally by the strobe oscillator. However, external control via the STROBE pin is still possible, and overrides the strobe oscillator command. Freescale Semiconductor ID ID ...
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... For all states: At any time, a low level applied to STROBE forces the circuit to state 10, and a low level applied on CONFB forces the state machine to state 1, configuration mode. When an EOM occurs before the current byte is fully shifted out, dummy bits are inserted until the number of shifted bits is a multiple MC33596 Data Sheet, Rev. 4 Freescale Semiconductor ...
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... Data Manager Enabled and Receiver Controlled by Strobe Pin Figure 12 shows the state diagram when the data manager is enabled and the strobe oscillator is disabled. In this configuration, the receiver is controlled only externally by the MCU. Freescale Semiconductor STROBE = 0 State 10 Off Off Counter = ROFF[2:0] ...
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... State 22 On Waiting for a Valid Header Header Received State 23 On Output Data and Clock Waiting for End of Message EOM Received and STROBE = 0 Figure 12. Receive Mode, DME = 1, SOE = 0 MC33596 Data Sheet, Rev. 4 STROBE = 1 EOM Received and STROBE = 1 Section 12, “Standby: LVD Freescale Semiconductor ...
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... On time is clocked by the crystal oscillator, enabling accurate control of the on time, and therefore of the current consumption of the whole system 1. Refer to parameter 5.10 found in Section 19.4, “PLL & Crystal Oscillator.” 2. Refer to parameter 5.9 found in Section 19.4, “PLL & Crystal Oscillator.” 3. Refer to preamble definition found in Freescale Semiconductor Off Off Setting Setting Toff Toff ...
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... Strobe at any time forces the circuit on CCIO Strobe 0 ROFF-1 ROFF 0 RON On Off Crystal Oscillator Startup Figure 14. Receiver On/Off Sequence MC33596 Data Sheet, Rev receiver on time), with N decoded is above CCIO is detected CCIO stops the GND STROBE SET TO V CCIO RON On Freescale Semiconductor ...
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... As a single convertor is used for the two analog signals, the RSSI register content is updated diglck × T timebase. digclk If RSSIE is reset, the whole RSSI module is switched off, reducing the current consumption. The output buffer connected to RSSIOUT is set to high impedance. Freescale Semiconductor Register”). LNA AGC Out D1 R1 Σ C1 Figure 15 ...
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... Therefore, the minimum duration of the high pulse on digclk Open Closed Updated Sampled and Hold RSSI Voltage Sampling CMD Figure 16. RSSI Operation in Sample Mode digclk MC33596 Data Sheet, Rev released closed when RSSIC Closed Open Frozen RSSI Value , S1 is opened closed when RSSIC Freescale Semiconductor ...
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... LVDE = 0: The receiver is in standby; consumption is reduced to leakage current (current state after POR). LVDE = 1: The LVD function is enabled; consumption is in the range of tens of microamperes. The only way to exit this mode back to configuration mode by applying a low level to CONFB and a high level to STROBE. Freescale Semiconductor Open Closed Frozen ...
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... STROBE, the time interval between two SPI accesses must be less than one digital clock period T 26 Bit 5 Bit 4 Bit Figure 18. Command Byte Table 7. Number N of Accessed Registers Number N of Accessed Registers Timing,” to view the timing definition for SPI communication. MC33596 Data Sheet, Rev. 4 Figure 2), the MCU is the Bit 2 Bit 1 Bit R/W Table 7. Freescale Semiconductor . digclk ...
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... State 1, the only state in this mode. Figure 21 describe the valid sequence for enabling a correct transition from Standby/LVD mode to configuration mode. SPI startup time corresponds to the addition of the crystal oscillator lock time (parameter 5.10) and the PLL lock time (parameter 5.9). Freescale Semiconductor NOTE MC33596 Data Sheet, Rev ...
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... Along with the ramp-up of power supply, one of these two conditions must be complied with: — Power supply of the MC33596 must rise from — The level on STROBE pin is lower than 0.75 V until the power supply reaches digclk 3 3 Figure NOTE MC33596 Data Sheet, Rev order to reset the state machine 23: Section 9, “MCU Freescale Semiconductor ...
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... MCU. This automatic feature may be used only in receiver mode; thus allowing fast switching between any different possible configurations. 15.1 Bit Definition Two sets of configuration registers are available. They are grouped in two different banks: Bank A and Bank B. Two bits are used to define which bank represents the state of the component. Freescale Semiconductor Figure 44 Mode.” ...
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... At any time possible to know which is the active bank by reading the status bit BANKS. Bit Name Direction Location BANKS R A & Location Bank A Bank B Comment Bank status: indicates which register bank is active. This bit, available in Bank A and Bank B, returns the same value. MC33596 Data Sheet, Rev. 4 Freescale Semiconductor ...
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... BANKA = X, BANKB = 0 State A OFF Strobe Pin If strobe pin is 1, configuration is defined by Bank A, BANKS = 1. If strobe pin is 0, MC33596 configuration is OFF message is received during State A, current state remains State end of message. Freescale Semiconductor State A OFF MC33596 Data Sheet, Rev. 4 Configuration Switching 31 ...
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... The MCU can override strobe oscillator control by controlling the strobe pin level. If MCU I/O port is in high impedance, the strobe oscillator will control the OFF/ON state of the MC33596. The various available sequences are described in the following subsections. 32 State B OFF MC33596 Data Sheet, Rev. 4 OFF State A Section 11.3, “Receiver Freescale Semiconductor ...
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... If strobe pin is 1, the state is ON and defined by BANKS at that time. It remains this state up to the release of strobe and end of message if a message is being received. • message is being received during State current state remains State end of message. Freescale Semiconductor State A OFF State B OFF ...
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... SL (Switch Level) selects the active level of the SWITCH output pin. 34 Bit 5 Bit 4 Bit 3 CF1 CF0 RESET R/W R/W R/W Figure 24. CONFIG1 Register LOF1 LOF0 MC33596 Data Sheet, Rev. 4 Bit 2 Bit 1 Bit 0 Addr SL LVDE CLKE $ R/W R/W R/W CF1 CF0 Freescale Semiconductor ...
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... MODU (Modulation) sets the data modulation type On/Off Keying (OOK) modulation 1 = Frequency Shift Keying (FSK) modulation DR[1:0] (Data Rate) configure the receiver blocks operating in base band. • Low-pass data filter Freescale Semiconductor Table 9. Active Level of SWITCH Output Pin Receiver Function Level on SWITCH Receiving — ...
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... Bit 5 Bit 4 Bit 3 OLS LVDS ILA1 R/W Figure 26. CONFIG3 Register MC33596 Data Sheet, Rev. 4 Data Manager Data Rate Range 2–2.8 kBd 4–5.6 kBd 8–10.6 kBd 16–22.4 kBd Bit 2 Bit 1 Bit 0 Addr ILA0 — — $ R/W — — Freescale Semiconductor ...
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... The typical preamble duration of three Manchester zeroes or ones at the data rate must then be increased, as shown in Table 13. Minimum Number of Manchester Symbols in Preamble AFF[1:0] 16.2 Command Register Figure 27 describes the Command register, COMMAND. Freescale Semiconductor Table 11. RF Input Level Attenuation RF Input Level ILA0 Attenuation ...
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... BANKS indicates which register bank is active. This bit, available in Bank A and Bank B, returns the same value Bank Bank A 16.3 Frequency Register Figure 28 defines the Frequency register Bit 5 Bit 4 Bit 3 — RSSIE EDD — R/W R/W Figure 27. COMMAND Register MC33596 Data Sheet, Rev. 4 Bit 2 Bit 1 Bit 0 Addr RAGC FAGC BANKS R/W R/W R Freescale Semiconductor $03 ...
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... F[11;0]/2048)xF 11 (35 + F[11;0]/2048)xF 16.4 Receiver On/Off Duration Register Figure 29 describes the receiver on/off duration register, RXONOFF. Bit 7 Bit 6 Bit Name BANKA RON3 Reset Value 0 1 Access R/W R/W Freescale Semiconductor Bit 13 Bit 12 Bit 11 — — F11 Bit 5 Bit 4 Bit ...
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... Bit 5 Bit 4 Bit 3 ID5 ID4 ID3 R/W R/W R/W Figure 30. ID Register MC33596 Data Sheet, Rev. 4 Switching.” digclk Section 11.3, “Receiver On/Off Strobe Bit 2 Bit 1 Bit 0 Addr ID2 ID1 ID0 $ R/W R/W R/W Table 18. Freescale Semiconductor ...
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... RSSI Result register, RSSI. Bit 7 Bit 6 Bit Name RSSI7 RSSI6 Reset Value 0 0 Access R R Bits RSSI[7:4] contain the result of the analog-to-digital conversion of the signal measured at the LNA output. Freescale Semiconductor Table 18. ID Length Selection IDL1 IDL0 ID Length Bit 5 ...
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... Read or write from any bank resets value. R/W-R[A} SOE can be modified in BANKA. Access from BANKB reflects BANKA value. R-R[A} RSSI value is directly read from RSSI converter. Reflected value is the same whatever the active byte. MC33596 Data Sheet, Rev. 4 Comment Freescale Semiconductor ...
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CONFIG1 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit Name LOF1 LOF0 CF1 CF0 RESET Reset Value R/W R/W R/W R/W R 304–434 304–315 315–434 314 No ...
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RXONOFF Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit Name BANKA RON3 RON2 RON1 RON0 Reset Value R/W R/W R/W R/W R/W 0Ah ID Bit 7 Bit ...
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... Format.” 2 Depending on the PLL status before entering configuration mode. For example, the transition time from standby to receiver running (FSK modulation, 19.2 kBd, AFFC = 0, data manager enabled) is: 0 µ 1)/19.2k = 970 µs. Freescale Semiconductor Table 21. Transition Time Definition Crystal Oscillator PLL Timing Startup Time, Parameter 5 ...
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... V –0.1 — CC — 0.7 x — V CCDIG 1.4 1.6 1.8 2.4 — — Limits Max Max Typ (FCE, (FCAE, FJE) FJAE) –104 –99 –97 –103.5 –98 –96 –103 –98 –96 Freescale Semiconductor = CC Unit mA μ μA μ Unit dBm dBm dBm ...
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... RFIN parallel resistance Receive mode 2.14 RFIN parallel resistance Standby mode 2.15 RFIN parallel capacitance Receive mode Freescale Semiconductor Table 3. Values refer to the circuit recommended in the application 54), unless otherwise specified. Typical values reflect average measurement at V Test Conditions, Comments Min — ...
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... MHz 434 MHz 868 MHz 916 MHz 25°C Temperature (°C) MC33596 Data Sheet, Rev Limits Max Max Unit Typ (FCE, (FCAE, FJE) FJAE) — — — dBm — — — dBm 36 — — — — dB 85°C Freescale Semiconductor = ...
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... Figure 36. FSK Sensitivity Variation Versus Temperature Freescale Semiconductor OOK Sensitivity Variation vs Voltage (Ref : 3V, 25°C, 4800bps) 2 Voltage (V) FSK Sensitivity Variation vs Temperature (Ref : 3V, 25°C, +/-64kHz, 4800 bps ) 315 MHz 434 MHz 868 MHz 916 MHz 25° ...
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... FSK Sensitivity Variation vs Voltage (Ref : 3V, 25°C, +/-64kHz, 4800bps ) 315 MHz 434 MHz 868 MHz 916 MHz 2 Voltage (V) Sensitivity Variation Versus Data Rate (Ref : 25°C, 3V, 434MHz , OOK, 4800bps) 4800 9600 Data Rate (bps) MC33596 Data Sheet, Rev. 4 3.6 V 19200 Freescale Semiconductor ...
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... Figure 39. FSK Sensitivity Variation Versus Data Rate Freescale Semiconductor Sensitivity Variation vs Data Rate (Ref : 25°C, 3V, 434MHz , FSK +/-64kHz, 4800bps) 4800 9600 Data Rate (bps) MC33596 Data Sheet, Rev. 4 Electrical Characteristics 19200 51 ...
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... FAGC = 0, input signal from –50 dBm to –100 dBm MC33596 Data Sheet, Rev. 4 120 130 140 150 160 170 Limits Min Typ Max — 1.5 — — 380 — — — 1.387 1.635 — — — 15 — Freescale Semiconductor = 3.0 CC Unit MHz kHz MHz MHz ms ...
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... Parameter 5.9 PLL lock time 5.1 Toggle time between 2 frequencies 5.10 Crystal oscillator startup time 5.8 Crystal series resistance Freescale Semiconductor Table 3. Values refer to the circuit recommended in the application 54), unless otherwise specified. Typical values reflect average measurement at V Test Conditions Comments ...
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... MC33596 Data Sheet, Rev. 4 868 MHz EXS00A-01654 NX5032GA NDK 24.16139 8 <70 Limits Min Typ Max 0.1 — — 0.1 — 10 — 1 — — 1 — — 0.5 — –14.2 — 15.8 Freescale Semiconductor Unit MHz pF Ω CC Unit ms nF μ ...
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... Output low voltage 8.2 Output high voltage 8.3 Fall and rise time 8.4 Output low voltage 8.5 Output high voltage Freescale Semiconductor Table 3. Values refer to the circuit recommended in the application 54), unless otherwise specified. Typical values reflect average measurement at V Test Conditions ...
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... MC33596 Data Sheet, Rev. 4 Limits Min Typ Max 1 — — 20 — — 1 — — digclk 100 — — 2 100 — — 1 — — digclk — — 100 120 — — 100 — — Freescale Semiconductor = CC Unit μs μs μ μ ...
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... Note: The external pullup resistor set on SEB pin (R2) is not mandatory. Instead of R2, an external pulldown resistor may be connected between SEB pin and ground. 20.1 Receiver Schematics Figure 43 and Figure 44 show the application schematic in receive mode for 3 V operation. Freescale Semiconductor 9.4 9.9 MC33596 Data Sheet, Rev. 4 Application Schematics 9.5 57 ...
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... MC33596 Data Sheet, Rev RSSIOUT RSSIOUT 25 25 STROBE STROBE 10k 10k 34 34 GND GND VCC VCC VCC VCC 10k 10k 10k 10k SEB SEB SCLK SCLK MOSI MOSI MISO MISO CONFB CONFB DATACLK DATACLK RSSIC RSSIC 17 17 Freescale Semiconductor ...
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... C5 100pF Figure 44. MC33596 Application Schematic in Strobe mode (3 V) The ON/OFF sequencing in receive mode is controlled internally. The STROBE pin from the MCU has to be configured in high impedance and wakeup mode is available when SOE bit is enabled. Freescale Semiconductor C13 1nF VCC C12 100pF ...
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... MC33596 Data Sheet, Rev RSSIOUT RSSIOUT 25 25 STROBE STROBE 10k 10k 34 34 GND GND VCC VCC VCC VCC 10k 10k 10k 10k SEB SEB SCLK SCLK MOSI MOSI MISO MISO CONFB CONFB DATACLK DATACLK RSSIC RSSIC 17 17 Freescale Semiconductor ...
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... Figure 46. MC33596 Application Schematic in Strobe Mode (5 V) The ON/OFF sequencing in receive mode is controlled internally. The STROBE pin from the MCU has to be configured in high impedance and wake up mode is available when SOE bit is enabled. Freescale Semiconductor C13 C13 1nF 1nF ...
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... MC33596 RF Modules available for MC33596 evaluation. Matching networks should be retuned if any change is made to the PCB (track width, length or place, or PCB thickness, or component value). Never use, as is, a matching network designed for another PCB. 62 NOTE MC33596 Data Sheet, Rev. 4 Freescale Semiconductor ...
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... Case Outline Dimensions 22.1 LQFP32 Case Freescale Semiconductor MC33596 Data Sheet, Rev. 4 Case Outline Dimensions 63 ...
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... Case Outline Dimensions 64 MC33596 Data Sheet, Rev. 4 Freescale Semiconductor ...
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... Freescale Semiconductor MC33596 Data Sheet, Rev. 4 Case Outline Dimensions 65 ...
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... Case Outline Dimensions 22.2 QFN32 Case 66 MC33596 Data Sheet, Rev. 4 Freescale Semiconductor ...
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... Freescale Semiconductor MC33596 Data Sheet, Rev. 4 Case Outline Dimensions 67 ...
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... Case Outline Dimensions 68 MC33596 Data Sheet, Rev. 4 Freescale Semiconductor ...
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... Freescale Semiconductor MC33596 Data Sheet, Rev. 4 Case Outline Dimensions 69 ...
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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...