MC33696FCAE Freescale Semiconductor, MC33696FCAE Datasheet - Page 37
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MC33696FCAE
Manufacturer Part Number
MC33696FCAE
Description
IC UHF RECEIVER PLL TUNED 32-QFN
Manufacturer
Freescale Semiconductor
Type
Transceiverr
Datasheet
1.MC33696FCAE.pdf
(80 pages)
Specifications of MC33696FCAE
Frequency
304, 315, 426, 434, 868 & 915MHz
Data Rate - Maximum
20kbps
Modulation Or Protocol
FSK, OOK
Applications
General Data Transfer
Power - Output
7.5dBm
Sensitivity
-106dBm
Voltage - Supply
2.7 V ~ 3.3 V, 4.5 V ~ 5.5 V
Current - Receiving
10.3mA
Current - Transmitting
13mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-QFN
Operating Frequency
915 MHz
Operating Supply Voltage
2.5 V or 3.3 V or 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 20 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-20C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Modulation Type
FSK/OOK
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
LVDE (Low Voltage Detection Enable) enables the low voltage detection function.
CLKE (Clock Enable) controls the DATACLK output buffer.
Figure 26
DSREF (Data Slicer Reference) selects the data slicer reference.
In the case of FSK modulation (MODU = 1), DSREF must be set.
FRM (Frequency Register Manager) enables either a user friendly access to one frequency register or a
direct access to the two frequency registers.
MODU (Modulation) sets the data modulation type.
DR[1:0] (Data Rate) configure the receiver blocks operating in base band.
Freescale Semiconductor
Reset Value
Bit Name
Access
0 = disabled
1 = enabled
0 = DATACLK remains low
1 = DATACLK outputs F
0 = Fixed reference (cannot be used in FSK)
1 = Adaptive reference (recommended for maximum sensitivity in OOK and FSK)
0 = The carrier frequency and the FSK deviation are defined by the F register
1 = The local oscillator frequency and the two carrier frequencies are defined by two frequency
registers, F and FT.
0 = On/Off Keying (OOK) modulation
1 = Frequency Shift Keying (FSK) modulation
describes configuration register 2, CONFIG2.
This bit is cleared by POR. In the event of a complete loss of the supply
voltage, LVD is disabled at power-up, but the information is not lost as the
status bit LVDS is set by POR.
DSREF
Bit 7
R/W
0
FRM
Bit 6
R/W
0
SL
0
1
Table 9. Active Level of SWITCH Output Pin
dataclk
MODU
Transceiver Function
Bit 5
R/W
Figure 26. CONFIG2 Register
0
MC33696 Data Sheet, Rev. 12
Transmitting
Transmitting
Receiving
Receiving
Bit 4
DR1
R/W
NOTE
1
Bit 3
DR0
R/W
0
Level on SWITCH
High
High
Low
Low
TRXE
Bit 2
R/W
0
DME
Bit 1
R/W
0
Register Description
SOE
Bit 0
R/W
0
Addr
$01
37