AT86RF231-ZUR Atmel, AT86RF231-ZUR Datasheet - Page 141

• Manufacturer Part Number: AT86RF231-ZUR
• Description: IC RADIO TXRX 2.4GHZ 32-VQFN
• Manufacturer: Atmel

Specifications of AT86RF231-ZUR

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Applications: Industrial Monitoring and Control, Wireless Alarm and Security Systems
• Power - Output: -17dBm ~ 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.3mA
• Current - Transmitting: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2405 MHz to 2480 MHz
• Interface Type: SPI
• Noise Figure: 6 dB
• Output Power: 20 dB
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 12.3 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8111C–MCU Wireless–09/09
Bit
+0x17
Read/Write
Reset Value
R/W
7
0
Reserved
6
R
0
Register 0x17 (XAH_CTRL_1):
The XAH_CTRL_1 register is a multi-purpose control register for various RX_AACK settings.
• Bit [7:6] - Reserved
• Bit 5 - AACK_FLTR_RES_FT
Refer to
• Bit 4 - AACK_UPLD_RES_FT
Refer to
• Bit 3 - Reserved
• Bit 2 - AACK_ACK_TIME
According to IEEE 802.15.4, section 7.5.6.4.2 the transmission of an acknowledgment frame
shall commence 12 symbol periods (aTurnaroundTime) after the reception of the last symbol of
a data or MAC command frame. This is fulfilled with the reset value of the register bit [2]
(AACK_ACK_TIME).
If AACK_ACK_TIME = 1 an acknowledgment frame is sent 32 µs after the reception of the last
symbol of a data or MAC command frame. This may be applied to proprietary networks including
networks using the High Data Rate Modes to improve the overall data throughput.
• Bit 1 - AACK_PROM_MODE
Refer to
• Bit 0 - Reserved
AACK_FLTR_RES_FT
Section 7.2.7 “Register Description - Control Registers” on page
Section 7.2.7 “Register Description - Control Registers” on page
R/W
7.2.7 “Register Description - Control Registers” on page
5
1
AACK_UPLD_RES_FT
R/W
4
0
Reserved
3
R
0
AACK_ACK_TIME
R/W
2
0
AACK_PROM_MODE
R/W
68.
1
0
68.
68.
AT86RF231
Reserved
0
R
0
XAH_CTRL_1
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