AT86RF231-ZUR Atmel, AT86RF231-ZUR Datasheet - Page 85

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AT86RF231-ZUR

Manufacturer Part Number
AT86RF231-ZUR
Description
IC RADIO TXRX 2.4GHZ 32-VQFN
Manufacturer
Atmel
Datasheet

Specifications of AT86RF231-ZUR

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Applications
Industrial Monitoring and Control, Wireless Alarm and Security Systems
Power - Output
-17dBm ~ 3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.3mA
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
2405 MHz to 2480 MHz
Interface Type
SPI
Noise Figure
6 dB
Output Power
20 dB
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
12.3 mA
Minimum Operating Temperature
- 40 C
Modulation
OQPSK
Protocol Supported
802.15.4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
8.2
8.2.1
8.2.2
8111C–MCU Wireless–09/09
Frame Check Sequence (FCS)
Overview
CRC Calculation
The Frame Check Sequence (FCS) is characterized by:
The FCS is intended for use at the MAC layer to detect corrupted frames at a first level of filter-
ing. It is computed by applying an ITU CRC polynomial to all transferred bytes following the
length field (MHR and MSDU fields). The frame check sequence has a length of 16 bit and is
located in the last two bytes of a frame (MAC footer, see
The AT86RF231 applies an FCS check on each received frame. The FCS check result is stored
in register bit RX_CRC_VALID in register 0x06 (PHY_RSSI).
On transmit the radio transceiver generates and appends the FCS bytes during the frame trans-
mission. This behavior can be disabled by setting register bit TX_AUTO_CRC_ON = 0 (register
0x04, TRX_CTRL_1).
The CRC polynomial used in IEEE 802.15.4 networks is defined by:
The FCS shall be calculated for transmission using the following algorithm:
Let
be the polynomial representing the sequence of bits for which the checksum is to be computed.
Multiply M(x) by x
Divide N(x) modulo 2 by the generator polynomial, G
The FCS field is given by the coefficients of the remainder polynomial, R(x).
Example:
Considering a 5 octet ACK frame. The MHR field consists of
0100 0000 0000 0000 0101 0110.
The leftmost bit (b
0010 0111 1001 1110.
The leftmost bit (r
M x ( )
N x ( )
G
• Indicate bit errors, based on a cyclic redundancy check (CRC) of length 16 bit
• Uses International Telecommunication Union (ITU) CRC polynomial
• Automatically evaluated during reception
• Can be automatically generated during transmission
R x ( )
16
x ( )
=
=
=
b
M x ( ) x
=
r
0
0
x
x
x
k 1
16
15
+
+
+
16
16
0
x
r
0
) is transmitted first in time.
1
12
b
) is transmitted first in time. The FCS is in this case
, giving the polynomial
x
1
14
+
x
k 2
x
+
5
+
+
1
+
b
2
r
14
x
k 3
x
+
+
r
15
+
b
k 2
x
+
b
16
k 1
(x), to obtain the remainder polynomial,
Figure 8-2 on page
AT86RF231
80).
85

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