XR16C854IJ-F Exar Corporation, XR16C854IJ-F Datasheet - Page 20
![IC UART FIFO 128B QUAD 68PLCC](/photos/19/3/190348/4243370_sml.jpg)
XR16C854IJ-F
Manufacturer Part Number
XR16C854IJ-F
Description
IC UART FIFO 128B QUAD 68PLCC
Manufacturer
Exar Corporation
Datasheet
1.XR16C854IV-F.pdf
(54 pages)
Specifications of XR16C854IJ-F
Features
*
Number Of Channels
4, QUART
Fifo's
128 Byte
Protocol
RS232, RS485
Voltage - Supply
2.97 V ~ 5.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
No. Of Channels
4
Data Rate
2Mbps
Supply Voltage Range
2.97V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
PLCC
No. Of Pins
68
Termination Type
SMD
Uart Features
Tx/Rx FIFO Counters
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR16C854IJ-F
Manufacturer:
EXAR
Quantity:
4
Company:
Part Number:
XR16C854IJ-F
Manufacturer:
Exar Corporation
Quantity:
10 000
XR16C854/854D
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
The infrared encoder and decoder are enabled by setting MCR register bit-6 to a ‘1’. When the infrared feature
is enabled, the transmit data output, TX, idles at logic zero level. Likewise, the RX input assumes an idle level
of logic zero from a reset and power up, see
Typically, the wireless infrared decoder receives the input pulse from the infrared sensing diode on the RX pin.
Each time it senses a light pulse, it returns a logic 1 to the data bit stream. However, this is not true with some
infrared modules on the market which indicate a logic 0 by a light pulse. So the 854 has a provision to invert
the input polarity to accomodate this. In this case user can enable FCTR bit-2 to invert the input signal.
The 854 supports low voltage system designs, hence, a sleep mode is included to reduce its power
consumption when the chip is not actively used.
All of these conditions must be satisfied for the 854 to enter sleep mode:
The 854 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for no
clock output as an indication that the device has entered the sleep mode.
2.19
■
■
■
■
no interrupts pending for all four channels of the 854 (ISR bit-0 = 1)
sleep mode of all four channels are enabled (IER bit-4 = 1)
modem inputs are not toggling (MSR bits 0-3 = 0)
RX input pins are idling at a logic 1
Sleep Mode with Auto Wake-Up
F
IGURE
Receive
IR Pulse
(RX pin)
RX Data
TX Data
Transmit
IR Pulse
(TX Pin)
12. I
NFRARED
0
Bit Time
Bit Time
0
1
1/16 Clock Delay
T
RANSMIT
1
0
Figure
0
1
Character
Data Bits
D
1
12.
ATA
0
20
Data Bits
3/16 Bit Time
Character
0
E
0
NCODING AND
0
1
1 1
1
0
R
0
ECEIVE
1/2 Bit Time
1
1
IRdecoder-
IrEncoder-1
D
ATA
D
ECODING
xr
REV. 3.0.1