XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 107

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
REV. 1.0.1
This section presents the timing requirements for the STS-3/STM-1 Telecom Bus Interface. In particular this
section prsents the following.
In the Transmit STS-3/STM-1 Telecom Bus Interface, all of the signals (which are output via this Bus Interface)
are updated upon the rising edge of TxA_CLK (19.44MHz clock signal).
Figures 12
STS-3/STM-1 Telecom Bus Interface, as well as the timing parameter (t1).
N
The TxSBFP input signal is sampled upon the rising edge of TxA_CLK by the Transmit STS-3/STM-1 Telecom
Bus Interface circuitry, as illustrated below in
F
STM-1 T
1.3
1.
2.
3.
4.
5.
1.3.1
1.3.1.1
OTE
IGURE
: The value for t1 can be found in
Identifies which edge of TxA_CLK in which the TxA_D[7:0], TxA_PL, TxA_C1J1, TxA_ALARM and
TxA_DP output pins are updated on.
The clock to output delays (from the rising edge of TxA_CLK to the instant that the TxA_D[7:0], TxA_PL,
TxA_C1J1, TxA_ALARM and TxA_DP output pins are updated.
Identifies which edge of RxD_CLK that the RxD_D[7:0], RxD_PL, RxD_C1J1, RxD_ALARM and
RxD_DP input pins are sampled on.
The set-up time requirements (from an update in the RxD_D[7:0], RxD_PL, RxD_C1J1, RxD_ALARM
and RxD_DP input signals to the rising edge of RxD_CLK).
The hold-time requirements (from the rising edge of RxD_CLK to a change in the RxD_D[7:0], RxD_PL,
RxD_C1J1, RxD_ALARM and RxD_DP input signals)
12. A
STS-3/STM-1 TELECOM BUS INTERFACE TIMING INFORMATION
ELECOM
TxA_CLK
TxA_C1J1
TxA_D[7:0]
STS-3/STM-1 Telecom Bus Interface Timing Information
TxA_PL
and
The Transmit STS-3/STM-1 Telecom Bus Interface Timing
N
I
LLUSTRATION OF THE
B
13
US
presents an illustration of the waveforms of the signals that will be output via the Transmit
I
NTERFACE
A2
.
t1
Table 8
W
C1
AVEFORMS OF THE
.
Figure
C1
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
13.
107
S
IGNALS THAT ARE OUTPUT VIA THE
J1
Data
J1
T
RANSMIT
XRT94L31
STS-3/

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