XR17V352IB-0A-EVB Exar Corporation, XR17V352IB-0A-EVB Datasheet - Page 20

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XR17V352IB-0A-EVB

Manufacturer Part Number
XR17V352IB-0A-EVB
Description
EVAL BOARD FOR XR17V352 113BGA
Manufacturer
Exar Corporation

Specifications of XR17V352IB-0A-EVB

Main Purpose
Interface, UART
Embedded
-
Utilized Ic / Part
XR17V352
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
XR17V352
HIGH PERFORMANCE DUAL PCI EXPRESS UART
TIMER OPERATION
The following paragraphs describe the operation of the 16-bit Timer/Counter. The following conventions will be
used in this discussion:
Timer Operation in One-Shot Mode:
In the one-shot mode, the Timer output will stay HIGH when started (default state) and will continue to stay
HIGH until it times out (reaches the terminal count of ‘N’ clocks), at which time it will become LOW and stay
LOW. If the Timer is re-started before the Timer times out, the counter is reset and the Timer will wait for
another time-out period before setting its output LOW (See
Timer does not have any effect and a ’Stop Timer’ command needs to be issued first which will set the Timer
output to its default HIGH state. The Timer must be programmed while it is stopped since the following
operations are blocked after the Timer has been started:
Timer Operation in Re-triggerable Mode:
In the re-triggerable mode, when the Timer is started, the Timer output will stay HIGH until it reaches half of the
terminal count N (= P clocks) and toggle LOW and stay LOW for a similar amount of time (Q clocks). The
above step will keep repeating until the Timer is stopped at which time the output will become HIGH (default
state). See
triggerable mode. The Timer must be programmed while it is stopped since the following operations are
blocked when the Timer is running:
Routing the Timer Output to MPIO[0] Pin:
MPIO[0] pin is by default (on power up or reset, for example) an input. However, whenever the Timer output is
routed to MPIO[0] pin,
’N’ is the 16-bit value programmed in the TIMER MSB, LSB registers
P +Q = N, where ’P’ and ’Q’ are approximately half of ’N’.
If N is even, P = Q = N/2.
If N is odd, P = (N – 1)/2 and Q = (N + 1)/2.
‘N’ can take any value from 0x0002 to 0xFFFF.
Any write to TIMER MSB, LSB registers
Issue of any command other than ’Start Timer’, ’Stop Timer’ and ’Reset Timer’
Any write to TIMER MSB, LSB registers
Issue of any command other than ’Stop Timer’ and ’Reset Timer’ (’Start Timer’ is not allowed)
MPIO[0] will be automatically selected as an output
MPIO[0] will become HIGH (the default state of Timer output)
All MPIO control registers (MPIOLVL, MPIOSEL etc) lose control over MPIO[0] and get the control back
only when the Timer output is de-routed from MPIO[0].
Figure
6. Also, after the Timer is started, re-starting the Timer does not have any effect in re-
20
Figure
6). If the Timer times out, re-starting the
REV. 1.0.1

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