XR17V352IB-0A-EVB Exar Corporation, XR17V352IB-0A-EVB Datasheet - Page 5

• Manufacturer Part Number: XR17V352IB-0A-EVB
• Description: EVAL BOARD FOR XR17V352 113BGA
• Manufacturer: Exar Corporation

Specifications of XR17V352IB-0A-EVB

• Main Purpose: Interface, UART
• Embedded: -
• Utilized Ic / Part: XR17V352
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REV. 1.0.1
PIN DESCRIPTIONS
JTAG SIGNALS
BUCK REGULATOR SIGNALS
ANCILLARY SIGNALS
ENABLE
PWRGD
RESET#
VCC33A
VCC33P
TEST4#
TMRCK
EN485#
TRST#
TEST0
TEST1
TEST2
TEST3
TEST5
VCC33
EEDO
ENIR#
N
EEDI
TMS
TDO
TCK
TDI
LX
LX
FB
AME
D5, E8, H7
B9, C9
P
C10
A10
D10
E10
K6
K7
A9
C7
D9
A6
C6
B6
D2
B7
A7
E9
H3
L9
L6
L7
IN
J8
J6
J5
#
T
Pwr
Pwr
Pwr
I/O
YPE
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB.
Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
JTAG Test Reset. This signal is active LOW.
JTAG Test Mode Select
JTAG Data Output
Connect to VCC to enable buck regulator. Connect to GND to disable buck
regulator.
Connect these two signals together to external 4.7uH inductor.
Connect this signal to other end of external 4.7uH inductor. 47uF capacitor to
GND is also required on this pin.
Indicates that 1.2V core has been powered up.
16-bit timer/counter external clock input.
Auto RS-485 mode enable (active low). This pin is sampled during power up,
following a hardware reset (RST#) or soft reset (register RESET). It can be
used to start up both UARTs in the Auto RS-485 Half-Duplex Direction control
mode. The sampled logic state is transferred to FCTR bit-5 in the UART
channel.
Infrared mode enable (active low). This pin is sampled during power up, fol-
lowing a hardware reset (RST#) or soft-reset (register RESET). It can be
used to start up both UARTs in the infrared mode. The sampled logic state is
transferred to MCR bit-6 in the UART.
Factory Test Modes. For normal operation, connect to GND.
Factory Test Mode 4. For normal operation, connect to VCC.
Factory Test I/O. For normal operation, connect to pull-down resistor.
3.3V I/O power supply.
JTAG Test Clock
JTAG Data Input
System reset (active low). In normal operation, this signal should be HIGH.
3.3V analog PHY power supply. A ferrite bead is recommended on this pin.
3.3V power supply voltage for output stage of buck regulator.
5
HIGH PERFORMANCE DUAL PCI EXPRESS UART
D
ESCRIPTION
XR17V352